Searched refs:D5 (Results 1 – 8 of 8) sorted by relevance
| /art/compiler/utils/mips/ |
| D | constants_mips.h | 37 D5 = 5, enumerator
|
| /art/runtime/arch/arm64/ |
| D | registers_arm64.h | 120 D5 = 5, enumerator
|
| D | quick_method_frame_info_arm64.h | 53 (1 << art::arm64::D3) | (1 << art::arm64::D4) | (1 << art::arm64::D5) |
|
| D | context_arm64.cc | 101 fprs_[D5] = nullptr; in SmashCallerSaves()
|
| /art/compiler/jni/quick/arm64/ |
| D | calling_convention_arm64.cc | 34 D0, D1, D2, D3, D4, D5, D6, D7
|
| /art/compiler/utils/arm/ |
| D | constants_arm.h | 66 D5 = 5, enumerator
|
| /art/compiler/jni/quick/arm/ |
| D | calling_convention_arm.cc | 39 D0, D1, D2, D3, D4, D5, D6, D7
|
| /art/compiler/utils/arm64/ |
| D | managed_register_arm64_test.cc | 232 dreg = Arm64ManagedRegister::FromDRegister(D5); in TEST()
240 EXPECT_EQ(D5, reg.AsOverlappingDRegister()); in TEST()
676 EXPECT_TRUE(vixl::d5.Is(Arm64Assembler::reg_d(D5))); in TEST()
|