Searched refs:Dsll (Results 1 – 3 of 3) sorted by relevance
| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 1193 __ Dsll(dst, lhs, shift_value); in HandleShift() local
1307 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2); in VisitArrayGet() local
1322 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2); in VisitArrayGet() local
1340 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); in VisitArrayGet() local
1355 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); in VisitArrayGet() local
1370 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); in VisitArrayGet() local
1385 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); in VisitArrayGet() local
1470 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2); in VisitArraySet() local
1488 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_4); in VisitArraySet() local
1515 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_8); in VisitArraySet() local
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 276 void Mips64Assembler::Dsll(GpuRegister rd, GpuRegister rt, int shamt) { in Dsll() function in art::mips64::Mips64Assembler
679 Dsll(rd, rd, shift_cnt); in LoadConst64()
685 Dsll(rd, rd, shift_cnt); in LoadConst64()
693 Dsll(rd, rd, shift_cnt); in LoadConst64()
702 Dsll(rd, rd, shift_cnt); in LoadConst64()
709 Dsll(rd, rd, shift_cnt); in LoadConst64()
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| D | assembler_mips64.h | 103 void Dsll(GpuRegister rd, GpuRegister rt, int shamt); // MIPS64
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