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Searched refs:InAt (Results 1 – 17 of 17) sorted by relevance

/art/compiler/optimizing/
Dintrinsics_arm64.cc166 Location input = locations->InAt(0); in MoveFPToInt()
173 Location input = locations->InAt(0); in MoveIntToFP()
218 Location in = locations->InAt(0); in GenReverseBytes()
265 Location in = locations->InAt(0); in GenReverse()
296 Location in = locations->InAt(0); in MathAbsFP()
332 Location in = locations->InAt(0); in GenAbsInteger()
362 Location op1 = locations->InAt(0); in GenMinMaxFP()
363 Location op2 = locations->InAt(1); in GenMinMaxFP()
421 Location op1 = locations->InAt(0); in GenMinMax()
422 Location op2 = locations->InAt(1); in GenMinMax()
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Dintrinsics_arm.cc157 Location input = locations->InAt(0); in MoveFPToInt()
169 Location input = locations->InAt(0); in MoveIntToFP()
225 Location in = locations->InAt(0); in MathAbsFP()
265 Location in = locations->InAt(0); in GenAbsInteger()
313 Register op1 = locations->InAt(0).AsRegister<Register>(); in GenMinMax()
314 Register op2 = locations->InAt(1).AsRegister<Register>(); in GenMinMax()
357 FromLowSToD(locations->InAt(0).AsFpuRegisterPairLow<SRegister>())); in VisitMathSqrt()
368 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPeekByte()
379 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPeekIntNative()
389 Register addr = invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>(); in VisitMemoryPeekLongNative()
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Dintrinsics_x86.cc194 Location input = locations->InAt(0); in MoveFPToInt()
209 Location input = locations->InAt(0); in MoveIntToFP()
310 Location input = locations->InAt(0); in VisitLongReverseBytes()
434 Location input = locations->InAt(0); in GenAbsLong()
477 Location op1_loc = locations->InAt(0); in GenMinMaxFP()
478 Location op2_loc = locations->InAt(1); in GenMinMaxFP()
606 Location op1_loc = locations->InAt(0); in GenMinMax()
607 Location op2_loc = locations->InAt(1); in GenMinMax()
725 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
773 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenSSE41FPToFPIntrinsic()
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Dintrinsics_x86_64.cc178 Location input = locations->InAt(0); in MoveFPToInt()
184 Location input = locations->InAt(0); in MoveIntToFP()
393 Location op1_loc = locations->InAt(0); in GenMinMaxFP()
394 Location op2_loc = locations->InAt(1); in GenMinMaxFP()
517 Location op1_loc = locations->InAt(0); in GenMinMax()
518 Location op2_loc = locations->InAt(1); in GenMinMax()
602 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
650 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenSSE41FPToFPIntrinsic()
716 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundFloat()
763 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundDouble()
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Dcode_generator_mips64.cc1058 GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); in HandleBinaryOp()
1059 Location rhs_location = locations->InAt(1); in HandleBinaryOp()
1116 FpuRegister lhs = locations->InAt(0).AsFpuRegister<FpuRegister>(); in HandleBinaryOp()
1117 FpuRegister rhs = locations->InAt(1).AsFpuRegister<FpuRegister>(); in HandleBinaryOp()
1165 GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); in HandleShift()
1166 Location rhs_location = locations->InAt(1); in HandleShift()
1266 GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); in VisitArrayGet()
1267 Location index = locations->InAt(1); in VisitArrayGet()
1408 GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); in VisitArrayLength()
1438 GpuRegister obj = locations->InAt(0).AsRegister<GpuRegister>(); in VisitArraySet()
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Dcode_generator_arm.cc955 DCHECK(instruction->GetLocations()->InAt(0).IsRegister()); in GenerateTestAndBranch()
956 __ cmp(instruction->GetLocations()->InAt(0).AsRegister<Register>(), in GenerateTestAndBranch()
963 DCHECK(locations->InAt(0).IsRegister()) << locations->InAt(0); in GenerateTestAndBranch()
964 Register left = locations->InAt(0).AsRegister<Register>(); in GenerateTestAndBranch()
965 if (locations->InAt(1).IsRegister()) { in GenerateTestAndBranch()
966 __ cmp(left, ShifterOperand(locations->InAt(1).AsRegister<Register>())); in GenerateTestAndBranch()
968 DCHECK(locations->InAt(1).IsConstant()); in GenerateTestAndBranch()
969 HConstant* constant = locations->InAt(1).GetConstant(); in GenerateTestAndBranch()
1043 Register left = locations->InAt(0).AsRegister<Register>(); in VisitCondition()
1045 if (locations->InAt(1).IsRegister()) { in VisitCondition()
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Dcode_generator_x86.cc863 Location lhs = instruction->GetLocations()->InAt(0); in GenerateTestAndBranch()
874 Location lhs = cond->GetLocations()->InAt(0); in GenerateTestAndBranch()
875 Location rhs = cond->GetLocations()->InAt(1); in GenerateTestAndBranch()
1003 Location lhs = locations->InAt(0); in VisitCondition()
1004 Location rhs = locations->InAt(1); in VisitCondition()
1179 DCHECK_EQ(ret->GetLocations()->InAt(0).AsRegister<Register>(), EAX); in VisitReturn()
1183 DCHECK_EQ(ret->GetLocations()->InAt(0).AsRegisterPairLow<Register>(), EAX); in VisitReturn()
1184 DCHECK_EQ(ret->GetLocations()->InAt(0).AsRegisterPairHigh<Register>(), EDX); in VisitReturn()
1189 DCHECK_EQ(ret->GetLocations()->InAt(0).AsFpuRegister<XmmRegister>(), XMM0); in VisitReturn()
1281 Location receiver = locations->InAt(0); in VisitInvokeVirtual()
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Dcode_generator_x86_64.cc826 Location lhs = instruction->GetLocations()->InAt(0); in GenerateTestAndBranch()
838 Location lhs = cond->GetLocations()->InAt(0); in GenerateTestAndBranch()
839 Location rhs = cond->GetLocations()->InAt(1); in GenerateTestAndBranch()
964 Location lhs = locations->InAt(0); in VisitCondition()
965 Location rhs = locations->InAt(1); in VisitCondition()
1055 Location left = locations->InAt(0); in VisitCompare()
1056 Location right = locations->InAt(1); in VisitCompare()
1231 DCHECK_EQ(ret->GetLocations()->InAt(0).AsRegister<CpuRegister>().AsRegister(), RAX); in VisitReturn()
1236 DCHECK_EQ(ret->GetLocations()->InAt(0).AsFpuRegister<XmmRegister>().AsFloatRegister(), in VisitReturn()
1390 Location receiver = locations->InAt(0); in VisitInvokeVirtual()
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Dcommon_arm64.h74 return RegisterFrom(instr->GetLocations()->InAt(input_index), in InputRegisterAt()
98 return FPRegisterFrom(instr->GetLocations()->InAt(input_index), in InputFPRegisterAt()
140 return OperandFrom(instr->GetLocations()->InAt(input_index), in InputOperandAt()
Dssa_liveness_analysis.h154 Location location = GetUser()->GetLocations()->InAt(GetInputIndex()); in RequiresRegister()
259 } else if (!locations->InAt(input_index).IsValid()) {
925 && (locations->InAt(0).IsRegister() in DefinitionRequiresRegister()
926 || locations->InAt(0).IsRegisterPair() in DefinitionRequiresRegister()
927 || locations->InAt(0).GetPolicy() == Location::kRequiresRegister))) { in DefinitionRequiresRegister()
931 && (locations->InAt(0).IsFpuRegister() in DefinitionRequiresRegister()
932 || locations->InAt(0).IsFpuRegisterPair() in DefinitionRequiresRegister()
933 || locations->InAt(0).GetPolicy() == Location::kRequiresFpuRegister))) { in DefinitionRequiresRegister()
Dcode_generator.cc85 DCHECK(CheckType(instruction->GetType(), locations->InAt(0))) in CheckTypeConsistency()
87 << " " << locations->InAt(0); in CheckTypeConsistency()
95 DCHECK(CheckType(instruction->InputAt(i)->GetType(), locations->InAt(i))) in CheckTypeConsistency()
97 << " " << locations->InAt(i); in CheckTypeConsistency()
332 BlockIfInRegister(locations->InAt(i)); in AllocateRegistersLocally()
348 Location loc = locations->InAt(i); in AllocateRegistersLocally()
397 result_location = locations->InAt(0); in AllocateRegistersLocally()
416 Location location = instruction->GetLocations()->InAt(i); in InitLocationsBaseline()
Dintrinsics.h105 Location actual_loc = locations->InAt(i); in INTRINSICS_LIST()
Dcode_generator_arm64.cc1333 Location index = locations->InAt(1); in VisitArrayGet()
1400 Location index = locations->InAt(1); in VisitArraySet()
1442 instruction, locations->InAt(0), locations->InAt(1)); in VisitBoundsCheck()
1464 instruction, locations->InAt(1), LocationFrom(obj_cls), instruction->GetDexPc()); in VisitCheckCast()
1545 if (compare->GetLocations()->InAt(1).IsConstant()) { in VisitCompare()
1547 HInstruction* right = compare->GetLocations()->InAt(1).GetConstant(); in VisitCompare()
1661 Location value = instruction->GetLocations()->InAt(0); in VisitDivZeroCheck()
1756 Location cond_val = instruction->GetLocations()->InAt(0); in GenerateTestAndBranch()
1889 instruction, locations->InAt(1), locations->Out(), instruction->GetDexPc()); in VisitInstanceOf()
1945 Location receiver = invoke->GetLocations()->InAt(0); in VisitInvokeInterface()
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Dregister_allocator.cc294 Location input = locations->InAt(i); in ProcessInstruction()
349 Location first = locations->InAt(0); in ProcessInstruction()
1520 Location expected_location = locations->InAt(use->GetInputIndex()); in ConnectSiblings()
1725 if (locations->InAt(0).IsUnallocated()) { in Resolve()
1728 DCHECK(locations->InAt(0).Equals(source)); in Resolve()
Dgraph_visualizer.cc247 DumpLocation(locations->InAt(i)); in PrintInstruction()
Dlocations.h488 Location InAt(uint32_t at) const { in InAt() function
Dssa_liveness_analysis.cc398 Location expected = locations->InAt(use->GetInputIndex()); in FindFirstRegisterHint()