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Searched refs:RAX (Results 1 – 10 of 10) sorted by relevance

/art/compiler/utils/x86_64/
Dmanaged_register_x86_64_test.cc31 X86_64ManagedRegister reg = X86_64ManagedRegister::FromCpuRegister(RAX); in TEST()
37 EXPECT_EQ(RAX, reg.AsCpuRegister()); in TEST()
123 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
132 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
141 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
150 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST()
209 X86_64ManagedRegister reg_eax = X86_64ManagedRegister::FromCpuRegister(RAX); in TEST()
210 EXPECT_TRUE(reg_eax.Equals(X86_64ManagedRegister::FromCpuRegister(RAX))); in TEST()
221 EXPECT_TRUE(!reg_xmm0.Equals(X86_64ManagedRegister::FromCpuRegister(RAX))); in TEST()
232 EXPECT_TRUE(!reg_st0.Equals(X86_64ManagedRegister::FromCpuRegister(RAX))); in TEST()
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Dmanaged_register_x86_64.cc27 P(RAX, RDX) \
28 P(RAX, RCX) \
29 P(RAX, RBX) \
30 P(RAX, RDI) \
Dassembler_x86_64_test.cc143 registers_.push_back(new x86_64::CpuRegister(x86_64::RAX)); in SetUpHelpers()
160 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "eax"); in SetUpHelpers()
177 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "ax"); in SetUpHelpers()
194 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "al"); in SetUpHelpers()
643 GetAssembler()->movl(x86_64::CpuRegister(x86_64::RAX), x86_64::Address( in TEST_F()
645 GetAssembler()->movl(x86_64::CpuRegister(x86_64::RAX), x86_64::Address( in TEST_F()
649 GetAssembler()->movl(x86_64::CpuRegister(x86_64::RAX), x86_64::Address( in TEST_F()
651 GetAssembler()->movl(x86_64::CpuRegister(x86_64::RAX), x86_64::Address( in TEST_F()
664 GetAssembler()->movw(x86_64::Address(x86_64::CpuRegister(x86_64::RAX), 0), in TEST_F()
671 GetAssembler()->movq(x86_64::Address(x86_64::CpuRegister(x86_64::RAX), 0), in TEST_F()
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Dassembler_x86_64.cc268 EmitOperand(Register::RAX, dst); in movb()
329 EmitOperand(Register::RAX, dst); in movw()
1151 const bool src_rax = src.AsRegister() == RAX; in xchgl()
1152 const bool dst_rax = dst.AsRegister() == RAX; in xchgl()
1171 const bool src_rax = src.AsRegister() == RAX; in xchgq()
1172 const bool dst_rax = dst.AsRegister() == RAX; in xchgq()
1315 if (reg.AsRegister() == RAX) { in testl()
1322 } else if (reg.AsRegister() == RAX) { in testl()
2146 } else if (operand.IsRegister(CpuRegister(RAX))) { in EmitComplex()
/art/compiler/jni/quick/x86_64/
Dcalling_convention_x86_64.cc30 return X86_64ManagedRegister::FromCpuRegister(RAX); in InterproceduralScratchRegister()
34 return X86_64ManagedRegister::FromCpuRegister(RAX); in InterproceduralScratchRegister()
46 return X86_64ManagedRegister::FromCpuRegister(RAX); in ReturnRegisterForShorty()
50 return X86_64ManagedRegister::FromCpuRegister(RAX); in ReturnRegisterForShorty()
63 return X86_64ManagedRegister::FromCpuRegister(RAX); in IntReturnRegister()
/art/runtime/arch/x86_64/
Dregisters_x86_64.cc29 if (rhs >= RAX && rhs <= R15) { in operator <<()
Dregisters_x86_64.h30 RAX = 0, enumerator
Dcontext_x86_64.cc66 gprs_[RAX] = const_cast<uintptr_t*>(&gZero); in SmashCallerSaves()
/art/compiler/optimizing/
Dintrinsics_x86_64.cc74 if (trg_reg.AsRegister() != RAX) { in MoveFromReturnRegister()
75 __ movl(trg_reg, CpuRegister(RAX)); in MoveFromReturnRegister()
81 if (trg_reg.AsRegister() != RAX) { in MoveFromReturnRegister()
82 __ movq(trg_reg, CpuRegister(RAX)); in MoveFromReturnRegister()
699 locations->SetOut(Location::RegisterLocation(RAX)); in CreateSSE41FPToIntLocations()
848 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringCompareTo()
881 locations->SetInAt(1, Location::RegisterLocation(RAX)); in CreateStringIndexOfLocations()
912 DCHECK_EQ(search_value.AsRegister(), RAX); in GenerateStringIndexOf()
1029 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringNewStringFromBytes()
1056 locations->SetOut(Location::RegisterLocation(RAX)); in VisitStringNewStringFromChars()
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Dcode_generator_x86_64.cc213 x64_codegen->Move(out, Location::RegisterLocation(RAX)); in EmitNativeCode()
255 x64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
308 x64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
517 __ testq(CpuRegister(RAX), Address( in GenerateFrameEntry()
1208 locations->SetInAt(0, Location::RegisterLocation(RAX)); in VisitReturn()
1231 DCHECK_EQ(ret->GetLocations()->InAt(0).AsRegister<CpuRegister>().AsRegister(), RAX); in VisitReturn()
1359 locations->SetOut(Location::RegisterLocation(RAX)); in HandleInvoke()
1413 invoke->GetLocations()->AddTemp(Location::RegisterLocation(RAX)); in VisitInvokeInterface()
2436 __ andl(CpuRegister(RAX), Immediate(kC2ConditionMask)); in GenerateRemFP()
2562 DCHECK_EQ(RAX, eax.AsRegister()); in GenerateDivRemWithAnyConstant()
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