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Searched refs:RSP (Results 1 – 7 of 7) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_x86_64.cc408 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); in SaveCoreRegister()
413 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreCoreRegister()
418 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister()
423 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister()
486 blocked_core_registers_[RSP] = true; in SetupBlockedRegisters()
518 CpuRegister(RSP), -static_cast<int32_t>(GetStackOverflowReservedBytes(kX86_64)))); in GenerateFrameEntry()
536 __ subq(CpuRegister(RSP), Immediate(adjust)); in GenerateFrameEntry()
544 __ movsd(Address(CpuRegister(RSP), offset), XmmRegister(kFpuCalleeSaves[i])); in GenerateFrameEntry()
549 __ movq(Address(CpuRegister(RSP), kCurrentMethodStackOffset), CpuRegister(RDI)); in GenerateFrameEntry()
560 __ movsd(XmmRegister(kFpuCalleeSaves[i]), Address(CpuRegister(RSP), offset)); in GenerateFrameExit()
[all …]
/art/compiler/utils/x86_64/
Dassembler_x86_64.cc2081 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant()
2082 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); in LoadDoubleConstant()
2377 subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame()
2386 movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame()
2393 movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame()
2399 movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame()
2403 …movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegiste… in BuildFrame()
2407 …movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame()
2410 …movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame()
2427 movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame()
[all …]
Dassembler_x86_64.h178 CHECK_EQ(base_in.AsRegister(), RSP); in Address()
179 Init(CpuRegister(RSP), disp.Int32Value()); in Address()
189 if (base_in.LowBits() == RSP) { in Init()
190 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init()
194 if (base_in.LowBits() == RSP) { in Init()
195 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init()
200 if (base_in.LowBits() == RSP) { in Init()
201 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init()
209 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode. in Address()
210 SetModRM(0, CpuRegister(RSP)); in Address()
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Dassembler_x86_64_test.cc148 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); in SetUpHelpers()
165 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "esp"); in SetUpHelpers()
182 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "sp"); in SetUpHelpers()
199 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "spl"); in SetUpHelpers()
982 GetAssembler()->filds(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F()
983 GetAssembler()->fildl(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 12)); in TEST_F()
991 GetAssembler()->fistps(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 16)); in TEST_F()
992 GetAssembler()->fistpl(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 24)); in TEST_F()
/art/runtime/arch/x86_64/
Dcontext_x86_64.cc31 gprs_[RSP] = &rsp_; in Reset()
33 rsp_ = X86_64Context::kBadGprBase + RSP; in Reset()
118 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
Dregisters_x86_64.h34 RSP = 4, enumerator
Dcontext_x86_64.h40 SetGPR(RSP, new_sp); in SetSP()