Searched refs:andq (Results 1 – 5 of 5) sorted by relevance
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 498 void andq(CpuRegister dst, const Immediate& imm);
499 void andq(CpuRegister dst, CpuRegister src);
500 void andq(CpuRegister reg, const Address& address);
|
| D | assembler_x86_64_test.cc | 538 DriverStr(RepeatRR(&x86_64::X86_64Assembler::andq, "andq %{reg2}, %{reg1}"), "andq"); in TEST_F()
542 DriverStr(RepeatRI(&x86_64::X86_64Assembler::andq, 4U /* andq only supports 32b imm */, in TEST_F()
779 GetAssembler()->andq(x86_64::CpuRegister(x86_64::R9), in TEST_F()
|
| D | assembler_x86_64.cc | 1374 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { in andq() function in art::x86_64::X86_64Assembler
1382 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() function in art::x86_64::X86_64Assembler
1390 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() function in art::x86_64::X86_64Assembler
|
| /art/compiler/optimizing/ |
| D | intrinsics_x86_64.cc | 1557 __ andq(temp, temp_mask); in SwapBits64() local
1558 __ andq(reg, temp_mask); in SwapBits64() local
|
| D | code_generator_x86_64.cc | 4400 __ andq(first_reg, Immediate(static_cast<int32_t>(value))); in HandleBitwiseOperation() local
4402 __ andq(first_reg, codegen_->LiteralInt64Address(value)); in HandleBitwiseOperation() local
4405 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation() local
4407 __ andq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation() local
|