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Searched refs:false_val (Results 1 – 9 of 9) sorted by relevance

/art/compiler/dex/quick/arm64/
Dint_arm64.cc99 void Arm64Mir2Lir::GenSelect(int32_t true_val, int32_t false_val, ConditionCode ccode, in GenSelect() argument
101 if (false_val == 0 || // 0 is better as first operand. in GenSelect()
104 true_val == false_val + 1) { // Potentially Csinc. in GenSelect()
106 std::swap(true_val, false_val); in GenSelect()
125 if (false_val == 1) { in GenSelect()
128 } else if (false_val == -1) { in GenSelect()
131 } else if (false_val == true_val + 1) { in GenSelect()
134 } else if (false_val == -true_val) { in GenSelect()
137 } else if (false_val == ~true_val) { in GenSelect()
143 LoadConstantNoClobber(rs_dest, false_val); in GenSelect()
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Dcodegen_arm64.h182 int32_t true_val, int32_t false_val, RegStorage rs_dest,
/art/compiler/dex/quick/arm/
Dint_arm.cc218 int32_t true_val, int32_t false_val, RegStorage rs_dest, in GenSelectConst32() argument
223 DCHECK(InexpensiveConstantInt(false_val)); in GenSelectConst32()
226 (false_val == 0 && code == kCondNe)) { in GenSelectConst32()
230 LoadConstant(rs_dest, code == kCondEq ? false_val : true_val); in GenSelectConst32()
238 LoadConstant(rs_dest, false_val); // .eq case - load true in GenSelectConst32()
255 int false_val = mir->dalvikInsn.vC; in GenSelect() local
260 std::swap(true_val, false_val); in GenSelect()
262 bool cheap_false_val = InexpensiveConstantInt(false_val); in GenSelect()
267 LoadConstant(rl_result.reg, false_val); in GenSelect()
273 LoadConstant(rl_result.reg, false_val); in GenSelect()
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Dcodegen_arm.h181 int32_t true_val, int32_t false_val, RegStorage rs_dest,
/art/compiler/dex/quick/x86/
Dint_x86.cc213 int32_t true_val, int32_t false_val, RegStorage rs_dest, in GenSelectConst32() argument
220 if (true_val == false_val) { in GenSelectConst32()
227 const bool zero_one_case = (true_val == 0 && false_val == 1) || (true_val == 1 && false_val == 0); in GenSelectConst32()
244 if (false_val == 0 && dest_intersect) { in GenSelectConst32()
246 std::swap(true_val, false_val); in GenSelectConst32()
249 LoadConstantNoClobber(rs_dest, false_val); in GenSelectConst32()
254 LoadConstantNoClobber(rs_dest, false_val); in GenSelectConst32()
262 LoadConstantNoClobber(rs_dest, false_val); in GenSelectConst32()
288 int false_val = mir->dalvikInsn.vC; in GenSelect() local
291 if (true_val == false_val) { in GenSelect()
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Dcodegen_x86.h272 int32_t true_val, int32_t false_val, RegStorage rs_dest,
/art/compiler/dex/quick/mips/
Dint_mips.cc281 int32_t true_val, int32_t false_val, RegStorage rs_dest, in GenSelectConst32() argument
288 LoadConstant(rs_dest, false_val); in GenSelectConst32()
Dcodegen_mips.h182 int32_t true_val, int32_t false_val, RegStorage rs_dest,
/art/compiler/dex/quick/
Dmir_to_lir.h1364 int32_t true_val, int32_t false_val, RegStorage rs_dest,