Home
last modified time | relevance | path

Searched refs:is64bit (Results 1 – 17 of 17) sorted by relevance

/art/compiler/dwarf/
Ddwarf_test.cc35 const bool is64bit = false; in TEST_F() local
125 WriteDebugFrameCIE(is64bit, DW_EH_PE_absptr, Reg(is64bit ? 16 : 8), in TEST_F()
129 WriteDebugFrameFDE(is64bit, 0, 0x01000000, 0x01000000, opcodes.data(), in TEST_F()
133 CheckObjdumpOutput(is64bit, "-W"); in TEST_F()
137 constexpr bool is64bit = true; in TEST_F() local
139 WriteDebugFrameCIE(is64bit, DW_EH_PE_absptr, Reg(16), in TEST_F()
144 WriteDebugFrameFDE(is64bit, 0, 0x0100000000000000, 0x0200000000000000, in TEST_F()
149 CheckObjdumpOutput(is64bit, "-W"); in TEST_F()
155 constexpr bool is64bit = true; in TEST_F() local
178 WriteDebugFrameCIE(is64bit, DW_EH_PE_absptr, Reg(16), in TEST_F()
[all …]
Dheaders.h40 void WriteDebugFrameCIE(bool is64bit, in WriteDebugFrameCIE() argument
56 if (is64bit) { in WriteDebugFrameCIE()
72 writer.Pad(is64bit ? 8 : 4); in WriteDebugFrameCIE()
78 void WriteDebugFrameFDE(bool is64bit, size_t cie_offset, in WriteDebugFrameFDE() argument
96 if (is64bit) { in WriteDebugFrameFDE()
105 writer.Pad(is64bit ? 8 : 4); in WriteDebugFrameFDE()
Ddwarf_test.h120 std::vector<std::string> Objdump(bool is64bit, const char* args) { in Objdump() argument
121 if (is64bit) { in Objdump()
129 void CheckObjdumpOutput(bool is64bit, const char* args) { in CheckObjdumpOutput() argument
130 std::vector<std::string> actual_lines = Objdump(is64bit, args); in CheckObjdumpOutput()
/art/compiler/dex/quick/mips/
Dutility_mips.cc306 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit() || r_src2.Is64Bit()); in OpRegRegReg() local
309 opcode = is64bit ? kMips64Daddu : kMipsAddu; in OpRegRegReg()
312 opcode = is64bit ? kMips64Dsubu : kMipsSubu; in OpRegRegReg()
327 opcode = is64bit ? kMips64Dsllv : kMipsSllv; in OpRegRegReg()
330 opcode = is64bit ? kMips64Dsrlv : kMipsSrlv; in OpRegRegReg()
333 opcode = is64bit ? kMips64Dsrav : kMipsSrav; in OpRegRegReg()
350 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit()); in OpRegRegImm() local
355 opcode = is64bit ? kMips64Daddiu : kMipsAddiu; in OpRegRegImm()
358 opcode = is64bit ? kMips64Daddu : kMipsAddu; in OpRegRegImm()
364 opcode = is64bit ? kMips64Daddiu : kMipsAddiu; in OpRegRegImm()
[all …]
/art/disassembler/
Ddisassembler_mips.h29 explicit DisassemblerMips(DisassemblerOptions* options, bool is64bit) : Disassembler(options), in DisassemblerMips() argument
30 is64bit_(is64bit), in DisassemblerMips()
/art/compiler/
Delf_writer_debug.cc39 bool is64bit = Is64BitInstructionSet(isa); in WriteDebugFrameCIE() local
62 WriteDebugFrameCIE(is64bit, addr_type, return_reg, in WriteDebugFrameCIE()
86 WriteDebugFrameCIE(is64bit, addr_type, return_reg, in WriteDebugFrameCIE()
103 WriteDebugFrameCIE(is64bit, addr_type, return_reg, in WriteDebugFrameCIE()
130 WriteDebugFrameCIE(is64bit, addr_type, return_reg, in WriteDebugFrameCIE()
157 WriteDebugFrameCIE(is64bit, addr_type, return_reg, in WriteDebugFrameCIE()
247 const bool is64bit = Is64BitInstructionSet(isa); in WriteDebugSections() local
285 DebugInfoEntryWriter<> info(is64bit, debug_abbrev); in WriteDebugSections()
330 DebugLineOpCodeWriter<> opcodes(is64bit, code_factor_bits_); in WriteDebugSections()
Dcfi_test.h49 constexpr bool is64bit = false; in GenerateExpected() local
51 dwarf::WriteDebugFrameCIE(is64bit, dwarf::DW_EH_PE_absptr, dwarf::Reg(8), in GenerateExpected()
54 dwarf::WriteDebugFrameFDE(is64bit, 0, 0, actual_asm.size(), &actual_cfi, in GenerateExpected()
Delf_writer_quick.cc162 const bool is64bit = Is64BitInstructionSet(isa); in Write() local
166 is64bit ? Patch<Elf_Addr, uint64_t, kPointerRelativeAddress> : in Write()
174 is64bit ? Patch<Elf_Addr, uint64_t, kAbsoluteAddress> : in Write()
/art/compiler/optimizing/
Dintrinsics_arm64.cc165 static void MoveFPToInt(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { in MoveFPToInt() argument
168 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output), in MoveFPToInt()
169 is64bit ? DRegisterFrom(input) : SRegisterFrom(input)); in MoveFPToInt()
172 static void MoveIntToFP(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { in MoveIntToFP() argument
175 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output), in MoveIntToFP()
176 is64bit ? XRegisterFrom(input) : WRegisterFrom(input)); in MoveIntToFP()
295 static void MathAbsFP(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { in MathAbsFP() argument
299 FPRegister in_reg = is64bit ? DRegisterFrom(in) : SRegisterFrom(in); in MathAbsFP()
300 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); in MathAbsFP()
330 bool is64bit, in GenAbsInteger() argument
[all …]
Dintrinsics_arm.cc156 static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { in MoveFPToInt() argument
159 if (is64bit) { in MoveFPToInt()
168 static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { in MoveIntToFP() argument
171 if (is64bit) { in MoveIntToFP()
224 static void MathAbsFP(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { in MathAbsFP() argument
228 if (is64bit) { in MathAbsFP()
263 bool is64bit, in GenAbsInteger() argument
270 if (is64bit) { in GenAbsInteger()
Dintrinsics_x86.cc170 static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke, bool is64bit) { in CreateFPToIntLocations() argument
176 if (is64bit) { in CreateFPToIntLocations()
181 static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke, bool is64bit) { in CreateIntToFPLocations() argument
187 if (is64bit) { in CreateIntToFPLocations()
193 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveFPToInt() argument
196 if (is64bit) { in MoveFPToInt()
208 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveIntToFP() argument
211 if (is64bit) { in MoveIntToFP()
348 static void MathAbsFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MathAbsFP() argument
353 if (is64bit) { in MathAbsFP()
Dintrinsics_x86_64.cc177 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveFPToInt() argument
180 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit); in MoveFPToInt()
183 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveIntToFP() argument
186 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit); in MoveIntToFP()
289 bool is64bit, in MathAbsFP() argument
301 if (is64bit) { in MathAbsFP()
350 static void GenAbsInteger(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in GenAbsInteger() argument
355 if (is64bit) { in GenAbsInteger()
/art/compiler/utils/x86_64/
Dassembler_x86_64.h337 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
369 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
370 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
395 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
396 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
398 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
399 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
410 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
412 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
Dassembler_x86_64.cc202 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
204 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
415 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
418 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
424 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
427 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
650 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
653 if (is64bit) { in cvtsi2ss()
665 void X86_64Assembler::cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2ss() argument
668 if (is64bit) { in cvtsi2ss()
[all …]
/art/compiler/dex/quick/x86/
Dutility_x86.cc649 bool is64bit = ((size == k64) || (size == kDouble)); in LoadBaseIndexedDisp() local
718 true /* is_load */, is64bit); in LoadBaseIndexedDisp()
721 true /* is_load */, is64bit); in LoadBaseIndexedDisp()
798 bool is64bit = (size == k64) || (size == kDouble); in StoreBaseIndexedDisp() local
883 false /* is_load */, is64bit); in StoreBaseIndexedDisp()
886 false /* is_load */, is64bit); in StoreBaseIndexedDisp()
/art/compiler/dex/quick/
Dcodegen_util.cc182 bool is64bit) { in AnnotateDalvikRegAccess() argument
190 lir->flags.alias_info = ENCODE_ALIAS_INFO(reg_id, is64bit); in AnnotateDalvikRegAccess()
Dmir_to_lir.h645 void AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, bool is64bit);