Searched refs:is_load (Results 1 – 3 of 3) sorted by relevance
| /art/disassembler/ |
| D | disassembler_arm.cc | 1345 bool is_load = HasBitSet(instr, 20); in DumpThumb32() local
1355 if (Rt.r == PC && is_load && !is_word) { in DumpThumb32()
1379 const char* ldr_str = is_load ? "ldr" : "str"; in DumpThumb32()
1382 bool unpred = (Rt.r == SP && !is_word) || (Rt.r == PC && !is_load); in DumpThumb32()
1383 if (Rn.r == PC && !is_load) { in DumpThumb32()
1390 if (Rn.r == TR && is_load) { in DumpThumb32()
1409 } else if (is_word && Rn.r == SP && imm8 == 4 && op4 == (is_load ? 0xB : 0xD)) { in DumpThumb32()
1410 opcode << (is_load ? "pop" : "push") << ".w"; in DumpThumb32()
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| /art/compiler/dex/quick/ |
| D | codegen_util.cc | 141 void Mir2Lir::SetMemRefType(LIR* lir, bool is_load, int mem_type) { in SetMemRefType() argument
147 if (is_load) { in SetMemRefType()
158 DCHECK(is_load); in SetMemRefType()
181 void Mir2Lir::AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, in AnnotateDalvikRegAccess() argument
183 DCHECK((is_load ? lir->u.m.use_mask : lir->u.m.def_mask)->Intersection(kEncodeMem).Equals( in AnnotateDalvikRegAccess()
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| D | mir_to_lir.h | 644 void SetMemRefType(LIR* lir, bool is_load, int mem_type);
645 void AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, bool is64bit);
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