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Searched refs:kNumberOfCpuRegisters (Results 1 – 15 of 15) sorted by relevance

/art/runtime/arch/x86/
Dcontext_x86.cc34 eip_ = X86Context::kBadGprBase + kNumberOfCpuRegisters; in Reset()
44 frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters); in FillCalleeSaves()
77 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in SetGPR()
94 volatile uintptr_t gprs[kNumberOfCpuRegisters + 1]; in DoLongJump()
95 for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) { in DoLongJump()
96 …gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86Context::kBadGprBase + … in DoLongJump()
103 uintptr_t esp = gprs[kNumberOfCpuRegisters - ESP - 1] - sizeof(intptr_t); in DoLongJump()
104 gprs[kNumberOfCpuRegisters] = esp; in DoLongJump()
Dcontext_x86.h48 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in IsAccessibleGPR()
53 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPRAddress()
58 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPR()
96 uintptr_t* gprs_[kNumberOfCpuRegisters];
Dregisters_x86.h38 kNumberOfCpuRegisters = 8, enumerator
Dquick_method_frame_info_x86.h49 (1 << art::x86::kNumberOfCpuRegisters); // fake return address callee save in X86CalleeSaveCoreSpills()
/art/runtime/arch/x86_64/
Dcontext_x86_64.cc34 rip_ = X86_64Context::kBadGprBase + kNumberOfCpuRegisters; in Reset()
44 frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters); in FillCalleeSaves()
90 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in SetGPR()
107 uintptr_t gprs[kNumberOfCpuRegisters + 1]; in DoLongJump()
110 for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) { in DoLongJump()
111 …gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86_64Context::kBadGprBase… in DoLongJump()
118 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
119 gprs[kNumberOfCpuRegisters] = rsp; in DoLongJump()
Dcontext_x86_64.h48 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in IsAccessibleGPR()
53 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPRAddress()
58 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPR()
83 uintptr_t* gprs_[kNumberOfCpuRegisters];
Dregisters_x86_64.h47 kNumberOfCpuRegisters = 16, enumerator
Dquick_method_frame_info_x86_64.h45 (1 << art::x86_64::kNumberOfCpuRegisters); // fake return address callee save; in X86_64CalleeSaveCoreSpills()
/art/compiler/utils/x86_64/
Dmanaged_register_x86_64.h47 const int kNumberOfCpuRegIds = kNumberOfCpuRegisters;
48 const int kNumberOfCpuAllocIds = kNumberOfCpuRegisters;
Dassembler_x86_64.cc1502 if (r != nullptr && *r >= Register::R8 && *r < Register::kNumberOfCpuRegisters) {
1506 if (x != nullptr && *x >= Register::R8 && *x < Register::kNumberOfCpuRegisters) {
1510 if (b != nullptr && *b >= Register::R8 && *b < Register::kNumberOfCpuRegisters) {
1532 if (dst != nullptr && *dst >= Register::R8 && *dst < Register::kNumberOfCpuRegisters) {
/art/compiler/utils/x86/
Dmanaged_register_x86.h48 const int kNumberOfCpuRegIds = kNumberOfCpuRegisters;
49 const int kNumberOfCpuAllocIds = kNumberOfCpuRegisters;
/art/compiler/jni/quick/x86/
Dcalling_convention_x86.cc178 return 1 << EBP | 1 << ESI | 1 << EDI | 1 << kNumberOfCpuRegisters; in CoreSpillMask()
/art/compiler/jni/quick/x86_64/
Dcalling_convention_x86_64.cc143 1 << kNumberOfCpuRegisters; in CoreSpillMask()
/art/compiler/optimizing/
Dcode_generator_x86.cc374 kNumberOfCpuRegisters, in CodeGeneratorX86()
412 FindFreeEntry(blocked_core_registers_, kNumberOfCpuRegisters)); in AllocateFreeRegister()
Dcode_generator_x86_64.cc434 kNumberOfCpuRegisters, in CodeGeneratorX86_64()
467 size_t reg = FindFreeEntry(blocked_core_registers_, kNumberOfCpuRegisters); in AllocateFreeRegister()