| /art/compiler/dex/quick/arm/ |
| D | utility_arm.cc | 440 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegRegShift() argument
443 bool thumb_form = (shift == 0) && r_dest.Low8() && r_src1.Low8() && r_src2.Low8(); in OpRegRegRegShift()
502 return NewLIR4(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift); in OpRegRegRegShift()
505 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); in OpRegRegRegShift()
509 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() argument
510 return OpRegRegRegShift(op, r_dest, r_src1, r_src2, 0); in OpRegRegReg()
513 LIR* ArmMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) { in OpRegRegImm() argument
518 bool all_low_regs = r_dest.Low8() && r_src1.Low8(); in OpRegRegImm()
524 return NewLIR3(kThumbLslRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
526 return NewLIR3(kThumb2LslRRI5, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
[all …]
|
| D | codegen_arm.h | 216 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
217 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
225 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
|
| /art/compiler/dex/quick/arm64/ |
| D | utility_arm64.cc | 695 LIR* Arm64Mir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegRegShift() argument
751 CHECK_EQ(r_dest.Is64Bit(), r_src1.Is64Bit()); in OpRegRegRegShift()
755 return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), shift); in OpRegRegRegShift()
759 return NewLIR3(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); in OpRegRegRegShift()
763 LIR* Arm64Mir2Lir::OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegRegExtend() argument
781 CHECK(r_src1.Is64Bit()); in OpRegRegRegExtend()
789 CHECK(!r_src1.Is64Bit()); in OpRegRegRegExtend()
797 return NewLIR4(widened_opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg(), in OpRegRegRegExtend()
801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() argument
802 return OpRegRegRegShift(op, r_dest, r_src1, r_src2, ENCODE_NO_SHIFT); in OpRegRegReg()
[all …]
|
| D | codegen_arm64.h | 219 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) OVERRIDE;
220 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
370 LIR* OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value);
373 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
379 LIR* OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
|
| D | int_arm64.cc | 636 RegLocation Arm64Mir2Lir::GenDivRem(RegLocation rl_dest, RegStorage r_src1, RegStorage r_src2, in GenDivRem() argument
638 CHECK_EQ(r_src1.Is64Bit(), r_src2.Is64Bit()); in GenDivRem()
642 OpRegRegReg(kOpDiv, rl_result.reg, r_src1, r_src2); in GenDivRem()
655 OpRegRegReg(kOpDiv, temp, r_src1, r_src2); in GenDivRem()
657 r_src2.GetReg(), r_src1.GetReg()); in GenDivRem()
|
| /art/compiler/dex/quick/x86/ |
| D | utility_x86.cc | 451 LIR* X86Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, in OpRegRegReg() argument
454 if (r_dest != r_src1 && r_dest != r_src2) { in OpRegRegReg()
456 if (r_src1 == r_src2) { in OpRegRegReg()
457 OpRegCopy(r_dest, r_src1); in OpRegRegReg()
459 } else if (r_src1 != rs_rBP) { in OpRegRegReg()
461 r_src1.GetReg() /* base */, r_src2.GetReg() /* index */, in OpRegRegReg()
465 r_src2.GetReg() /* base */, r_src1.GetReg() /* index */, in OpRegRegReg()
469 OpRegCopy(r_dest, r_src1); in OpRegRegReg()
472 } else if (r_dest == r_src1) { in OpRegRegReg()
483 OpRegCopy(t_reg, r_src1); in OpRegRegReg()
[all …]
|
| D | fp_x86.cc | 66 RegStorage r_src1 = rl_src1.reg; in GenArithOpFloat() local
72 OpRegCopy(r_dest, r_src1); in GenArithOpFloat()
|
| D | codegen_x86.h | 312 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) OVERRIDE;
313 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
|
| /art/compiler/dex/quick/mips/ |
| D | utility_mips.cc | 304 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { in OpRegRegReg() argument
306 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit() || r_src2.Is64Bit()); in OpRegRegReg()
343 return NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_src2.GetReg()); in OpRegRegReg()
346 LIR* MipsMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) { in OpRegRegImm() argument
350 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit()); in OpRegRegImm()
446 res = NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), value); in OpRegRegImm()
448 if (r_dest != r_src1) { in OpRegRegImm()
450 NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_dest.GetReg()); in OpRegRegImm()
460 NewLIR3(opcode, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg()); in OpRegRegImm()
|
| D | codegen_mips.h | 213 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
214 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
|
| /art/compiler/dex/quick/ |
| D | mir_to_lir.h | 1455 virtual LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) = 0;
1456 virtual LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1,
|