Searched refs:rl_true (Results 1 – 3 of 3) sorted by relevance
| /art/compiler/dex/quick/arm/ |
| D | int_arm.cc | 295 RegLocation rl_true = mir_graph_->reg_location_[mir->ssa_rep->uses[1]]; in GenSelect() local
297 rl_true = LoadValue(rl_true, result_reg_class); in GenSelect()
302 if (rl_result.reg.GetReg() == rl_true.reg.GetReg()) { // Is the "true" case already in place? in GenSelect()
307 OpRegCopy(rl_result.reg, rl_true.reg); in GenSelect()
310 OpRegCopy(rl_result.reg, rl_true.reg); in GenSelect()
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| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 207 RegLocation rl_true = mir_graph_->reg_location_[mir->ssa_rep->uses[1]]; in GenSelect() local
211 rl_true = LoadValue(rl_true, result_reg_class); in GenSelect()
218 rl_true.reg.GetReg(), rl_false.reg.GetReg(), ArmConditionEncoding(mir->meta.ccode)); in GenSelect()
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| /art/compiler/dex/quick/x86/ |
| D | int_x86.cc | 351 RegLocation rl_true = mir_graph_->GetSrc(mir, 1); in GenSelect() local
353 rl_true = LoadValue(rl_true, result_reg_class); in GenSelect()
375 if (rl_result.reg.GetReg() == rl_true.reg.GetReg()) { in GenSelect()
378 OpCondRegReg(kOpCmov, ccode, rl_result.reg, rl_true.reg); in GenSelect()
381 OpCondRegReg(kOpCmov, ccode, rl_result.reg, rl_true.reg); in GenSelect()
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