| /external/vixl/src/vixl/a64/ |
| D | decoder-a64.cc | 163 VIXL_ASSERT(instr->Bit(28) == 0x1); in DecodePCRelAddressing()
182 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
190 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
191 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
203 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
204 if (instr->Bit(24) == 0) { in DecodeBranchSystemException()
247 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
275 if ((instr->Bit(28) == 0) && (instr->Bit(29) == 0) && (instr->Bit(26) == 1)) { in DecodeLoadStore()
280 if (instr->Bit(24) == 0) { in DecodeLoadStore()
281 if (instr->Bit(28) == 0) { in DecodeLoadStore()
[all …]
|
| D | macro-assembler-a64.cc | 2428 IncludeByRegList(available_, list.list() & ~(xzr.Bit() | sp.Bit())); in Include()
2441 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Include()
2443 include &= ~(xzr.Bit() | sp.Bit()); in Include()
2453 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Include()
2472 RegList exclude = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Exclude()
2481 RegList excludefp = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Exclude()
2497 exclude |= regs[i].Bit(); in Exclude()
2499 excludefp |= regs[i].Bit(); in Exclude()
|
| /external/v8/src/arm64/ |
| D | decoder-arm64-inl.h | 102 DCHECK(instr->Bit(28) == 0x1); in DecodePCRelAddressing()
122 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
130 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
131 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
143 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
144 if (instr->Bit(24) == 0) { in DecodeBranchSystemException()
187 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
216 if (instr->Bit(24) == 0) { in DecodeLoadStore()
217 if (instr->Bit(28) == 0) { in DecodeLoadStore()
218 if (instr->Bit(29) == 0) { in DecodeLoadStore()
[all …]
|
| D | debug-arm64.cc | 156 DCHECK((scratch.Bit() & object_regs) == 0); in Generate_DebugBreakCallHelper()
157 DCHECK((scratch.Bit() & non_object_regs) == 0); in Generate_DebugBreakCallHelper()
233 Generate_DebugBreakCallHelper(masm, x1.Bit() | x3.Bit(), 0, x10); in GenerateCallICStubDebugBreak()
241 Generate_DebugBreakCallHelper(masm, receiver.Bit() | name.Bit(), 0, x10); in GenerateLoadICDebugBreak()
251 masm, receiver.Bit() | name.Bit() | value.Bit(), 0, x10); in GenerateStoreICDebugBreak()
267 masm, receiver.Bit() | name.Bit() | value.Bit(), 0, x10); in GenerateKeyedStoreICDebugBreak()
276 Generate_DebugBreakCallHelper(masm, x0.Bit(), 0, x10); in GenerateCompareNilICDebugBreak()
284 Generate_DebugBreakCallHelper(masm, x0.Bit(), 0, x10); in GenerateReturnDebugBreak()
293 Generate_DebugBreakCallHelper(masm, x1.Bit(), 0, x10); in GenerateCallFunctionStubDebugBreak()
303 Generate_DebugBreakCallHelper(masm, x1.Bit(), x0.Bit(), x10); in GenerateCallConstructStubDebugBreak()
[all …]
|
| D | assembler-arm64.h | 58 RegList Bit() const;
281 return (Bit() & kAllocatableFPRegisters) != 0; in IsAllocatable()
452 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()),
542 if (!other1.IsNone() && (other1.type() == type_)) list |= other1.Bit();
543 if (!other2.IsNone() && (other2.type() == type_)) list |= other2.Bit();
544 if (!other3.IsNone() && (other3.type() == type_)) list |= other3.Bit();
545 if (!other4.IsNone() && (other4.type() == type_)) list |= other4.Bit();
|
| /external/v8/src/arm/ |
| D | constants-arm.h | 453 inline int Bit(int nr) const { in Bit() function
470 static inline int Bit(Instr instr, int nr) { in Bit() function
523 inline int NValue() const { return Bit(7); } in NValue()
524 inline int MValue() const { return Bit(5); } in MValue()
525 inline int DValue() const { return Bit(22); } in DValue()
527 inline int PValue() const { return Bit(24); } in PValue()
528 inline int UValue() const { return Bit(23); } in UValue()
529 inline int Opc1Value() const { return (Bit(23) << 2) | Bits(21, 20); } in Opc1Value()
532 inline int SzValue() const { return Bit(8); } in SzValue()
533 inline int VLValue() const { return Bit(20); } in VLValue()
[all …]
|
| D | disasm-arm.cc | 240 shift_names[instr->Bit(6) * 2], in PrintShiftSat()
364 (instr->Bit(24) == 0x0) && in FormatVFPRegister()
366 (instr->Bit(4) == 0x1)) { in FormatVFPRegister()
368 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4); in FormatVFPRegister()
451 if (instr->Bit(21) == 0) { in FormatOption()
477 if (instr->Bit(21) == 0) { in FormatOption()
527 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) && in FormatOption()
528 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) { in FormatOption()
529 if (instr->Bit(5) == 1) { in FormatOption()
638 if (instr->Bit(22) == 0) { in FormatOption()
[all …]
|
| D | constants-arm.cc | 25 high16 |= (0xff * Bit(18)) << 6; // xxbbbbbb,bbxxxxxx. in DoubleImmedVmov()
26 high16 |= (Bit(18) ^ 1) << 14; // xBxxxxxx,xxxxxxxx. in DoubleImmedVmov()
27 high16 |= Bit(19) << 15; // axxxxxxx,xxxxxxxx. in DoubleImmedVmov()
|
| D | simulator-arm.cc | 1352 if (instr->Bit(4) == 0) { in GetShiftRm()
2006 if (instr->Bit(24) == 0) { in DecodeType01()
2014 if (instr->Bit(23) == 0) { in DecodeType01()
2015 if (instr->Bit(21) == 0) { in DecodeType01()
2029 if (instr->Bit(22) == 0) { in DecodeType01()
2060 if (instr->Bit(22) == 1) { in DecodeType01()
2089 if (instr->Bit(22) == 0) { in DecodeType01()
2177 if (((instr->Bits(7, 4) & 0xd) == 0xd) && (instr->Bit(20) == 0)) { in DecodeType01()
2567 if (instr->Bit(4) == 0) { in DecodeType3()
2570 if (instr->Bit(5) == 0) { in DecodeType3()
[all …]
|
| /external/clang/lib/Basic/ |
| D | Sanitizers.cpp | 20 unsigned Bit = static_cast<unsigned>(K); in has() local
21 return Kinds & (1 << Bit); in has()
25 unsigned Bit = static_cast<unsigned>(K); in set() local
26 Kinds = Value ? (Kinds | (1 << Bit)) : (Kinds & ~(1 << Bit)); in set()
|
| /external/llvm/lib/Fuzzer/ |
| D | FuzzerMutate.cpp | 17 int Bit = rand() % 8; in FlipRandomBit() local
18 char Mask = 1 << Bit; in FlipRandomBit()
20 if (X & (1 << Bit)) in FlipRandomBit()
|
| /external/clang/test/Parser/ |
| D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) in InterlockedBitTestAndSet() argument
8 mov eax, Bit in InterlockedBitTestAndSet()
|
| /external/llvm/lib/Transforms/IPO/ |
| D | LowerBitSets.cpp | 159 unsigned Bit = 0; in allocate() local
161 if (BitAllocs[I] < BitAllocs[Bit]) in allocate()
162 Bit = I; in allocate()
164 AllocByteOffset = BitAllocs[Bit]; in allocate()
168 BitAllocs[Bit] = ReqSize; in allocate()
173 AllocMask = 1 << Bit; in allocate()
388 for (auto Bit : BSI.Bits) in createBitSetTest() local
389 Bits |= uint64_t(1) << Bit; in createBitSetTest()
476 Value *Bit = createBitSetTest(ThenB, BSI, BAI, BitOffset); in lowerBitSetCall() local
484 P->addIncoming(Bit, ThenB.GetInsertBlock()); in lowerBitSetCall()
|
| /external/clang/docs/ |
| D | ControlFlowIntegrityDesign.rst | 49 .. csv-table:: Bit Vectors for A, B, C
56 Bit vectors are represented in the object file as byte arrays. By loading
58 test bits from the bit set with a relatively short instruction sequence. Bit
112 Stripping Leading/Trailing Zeros in Bit Vectors
121 .. csv-table:: Bit Vectors for A, B, C
128 Short Inline Bit Vectors
195 those sub-hierarchies need to be (see "Stripping Leading/Trailing Zeros in Bit
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
|
| /external/llvm/docs/CommandGuide/ |
| D | llvm-bcanalyzer.rst | 207 The total number of 32-bit integers encoded using the Variable Bit Rate
212 The total number of 64-bit integers encoded using the Variable Bit Rate encoding
218 the Variable Bit Rate encoding scheme.
223 integers had they not been compressed with the Variable Bit Rage encoding
228 The total number of bytes saved by using the Variable Bit Rate encoding scheme.
288 integers that use the Variable Bit Rate encoding scheme.
294 Bit Rate encoding scheme.
298 The total number of bytes saved in this function by using the Variable Bit
|
| /external/llvm/include/llvm/TableGen/ |
| D | Record.h | 543 virtual Init *getBit(unsigned Bit) const = 0;
613 Init *getBit(unsigned Bit) const override { in getBit() argument
643 Init *getBit(unsigned Bit) const override { in getBit() argument
644 assert(Bit < 1 && "Bit index out of range!"); in getBit()
702 Init *getBit(unsigned Bit) const override { in getBit() argument
703 assert(Bit < Bits.size() && "Bit index out of range!"); in getBit()
704 return Bits[Bit]; in getBit()
743 Init *getBit(unsigned Bit) const override { in getBit() argument
744 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
783 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
|
| /external/llvm/lib/TableGen/ |
| D | Record.cpp | 232 if (BitInit *Bit = dyn_cast<BitInit>(BI->getBit(i))) { in convertValue() local
233 Result |= Bit->getValue() << i; in convertValue()
508 if (Init *Bit = getBit(e-i-1)) in getAsString() local
509 Result += Bit->getAsString(); in getAsString()
544 Init *Bit = CachedInit->getBit(CurBit->getBitNum()); in resolveReferences() local
545 NewBits[i] = fixBitInit(RV, CurBit, Bit); in resolveReferences()
562 Init *Bit = CurBitVar->getBit(CurBit->getBitNum()); in resolveReferences() local
563 NewBits[i] = fixBitInit(RV, CurBit, Bit); in resolveReferences()
747 Init *OpInit::getBit(unsigned Bit) const { in getBit()
750 return VarBitInit::get(const_cast<OpInit*>(this), Bit); in getBit()
[all …]
|
| D | TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator
|
| /external/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFDebugInfoEntry.cpp | 85 uint64_t Bit = 1ULL << Shift; in dumpApplePropertyAttribute() local
86 if (const char *PropName = ApplePropertyString(Bit)) in dumpApplePropertyAttribute()
89 OS << format("DW_APPLE_PROPERTY_0x%" PRIx64, Bit); in dumpApplePropertyAttribute()
90 if (!(Val ^= Bit)) in dumpApplePropertyAttribute()
|
| /external/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 6067 masm.FPTmpList()->set_list(d0.Bit()); in TEST()
6089 masm.FPTmpList()->set_list(d0.Bit()); in TEST()
8239 CHECK(x0.Bit() == (1UL << 0)); in TEST()
8240 CHECK(x1.Bit() == (1UL << 1)); in TEST()
8241 CHECK(x10.Bit() == (1UL << 10)); in TEST()
8244 CHECK(fp.Bit() == (1UL << kFramePointerRegCode)); in TEST()
8245 CHECK(lr.Bit() == (1UL << kLinkRegCode)); in TEST()
8248 CHECK(xzr.Bit() == (1UL << kZeroRegCode)); in TEST()
8251 CHECK(jssp.Bit() == (1UL << kJSSPCode)); in TEST()
8252 CHECK(csp.Bit() == (1UL << kSPRegInternalCode)); in TEST()
[all …]
|
| /external/antlr/antlr-3.4/runtime/ObjC/Framework/test/runtime/sets/ |
| D | ANTLRBitSetTest.m | 69 STAssertTrue([bitSet member:1], @"Bit at index 1 is not a member...");
73 STAssertFalse([bitSet member:1], @"Bit at index 1 is a member...");
|
| /external/llvm/lib/Target/X86/Utils/ |
| D | X86ShuffleDecode.cpp | 347 int Bit = NumElements > 8 ? i % (128 / ElementBits) : i; in DecodeBLENDMask() local
348 assert(Bit < 8 && in DecodeBLENDMask()
350 ShuffleMask.push_back(((Imm >> Bit) & 1) ? NumElements + i : i); in DecodeBLENDMask()
|
| /external/clang/include/clang/Basic/ |
| D | BuiltinsAArch64.def | 26 // Bit manipulation
|
| /external/llvm/include/llvm/Support/ |
| D | CommandLine.h | 1388 template <class T> static unsigned Bit(const T &V) {
1408 *Location |= Bit(V);
1414 return (*Location & Bit(V)) != 0;
1424 template <class T> static unsigned Bit(const T &V) {
1432 template <class T> void addValue(const T &V) { Bits |= Bit(V); }
1436 template <class T> bool isSet(const T &V) { return (Bits & Bit(V)) != 0; }
|
| /external/llvm/lib/Target/R600/ |
| D | R600Packetizer.cpp | 229 void setIsLastBit(MachineInstr *MI, unsigned Bit) const { in setIsLastBit()
231 MI->getOperand(LastOp).setImm(Bit); in setIsLastBit()
|