Searched refs:DSRA32 (Results 1 – 10 of 10) sorted by relevance
| /external/valgrind/none/tests/mips64/ |
| D | shift_instructions.c | 7 DSLL32, DSLLV, DSRA, DSRA32, enumerator
96 case DSRA32: in main()
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| /external/pcre/dist/sljit/ |
| D | sljitNativeMIPS_64.c | 179 return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(24), DR(dst)); in emit_single_op()
193 return push_inst(compiler, DSRA32 | T(dst) | D(dst) | SH_IMM(16), DR(dst)); in emit_single_op()
407 …FAIL_IF(push_inst(compiler, SELECT_OP(DSRA32, SRA) | T(dst) | DA(UGREATER_FLAG) | SH_IMM(31), UGRE… in emit_single_op()
431 EMIT_SHIFT(DSRA, DSRA32, SRA, DSRAV, SRAV); in emit_single_op()
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| D | sljitNativeMIPS_common.c | 134 #define DSRA32 (HI(0) | LO(63)) macro
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| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 232 case DSRA32: in InstructionType()
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| D | constants-mips64.h | 410 DSRA32 = ((7 << 3) + 7), enumerator
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| D | disasm-mips64.cc | 720 case DSRA32: in DecodeTypeRegister()
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| D | simulator-mips64.cc | 2029 case DSRA32: in ConfigureTypeRegister()
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| D | assembler-mips64.cc | 1776 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSRA32); in dsra32()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 75 Inst.setOpcode(Mips::DSRA32); in LowerLargeShift()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 161 def DSRA32 : shift_rotate_imm<"dsra32", uimm5, GPR64Opnd, II_DSRA32>,
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