Searched refs:DSRL32 (Results 1 – 10 of 10) sorted by relevance
| /external/pcre/dist/sljit/ |
| D | sljitNativeMIPS_64.c | 204 return push_inst(compiler, DSRL32 | T(dst) | D(dst) | SH_IMM(0), DR(dst)); in emit_single_op()
227 …FAIL_IF(push_inst(compiler, SELECT_OP(DSRL32, SRL) | T(src2) | DA(EQUAL_FLAG) | SH_IMM(31), EQUAL_… in emit_single_op()
287 …return push_inst(compiler, SELECT_OP(DSRL32, SLL) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG) | SH_IMM… in emit_single_op()
363 …return push_inst(compiler, SELECT_OP(DSRL32, SRL) | TA(OVERFLOW_FLAG) | DA(OVERFLOW_FLAG) | SH_IMM… in emit_single_op()
427 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
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| D | sljitNativeMIPS_common.c | 137 #define DSRL32 (HI(0) | LO(62)) macro
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| /external/valgrind/none/tests/mips64/ |
| D | shift_instructions.c | 8 DSRAV, DSRL, DSRL32, DSRLV, enumerator
125 case DSRL32: in main()
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| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 229 case DSRL32: in InstructionType()
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| D | constants-mips64.h | 409 DSRL32 = ((7 << 3) + 6), enumerator
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| D | disasm-mips64.cc | 711 case DSRL32: in DecodeTypeRegister()
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| D | simulator-mips64.cc | 2020 case DSRL32: in ConfigureTypeRegister()
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| D | assembler-mips64.cc | 1771 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSRL32); in dsrl32()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 72 Inst.setOpcode(Mips::DSRL32); in LowerLargeShift()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 159 def DSRL32 : shift_rotate_imm<"dsrl32", uimm5, GPR64Opnd, II_DSRL32>,
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