| /external/llvm/test/CodeGen/AArch64/ |
| D | movw-consts.ll | 52 ; A 32-bit MOVN can generate some 64-bit patterns that a 64-bit one
121 ; Mustn't MOVN w0 here.
|
| D | arm64-movi.ll | 76 ; Tests for MOVN with MOVK.
|
| /external/valgrind/none/tests/mips64/ |
| D | arithmetic_instruction.c | 12 MUL, MULT, MULTU, MOVN, enumerator
258 case MOVN: in main()
|
| D | move_instructions.stdout.exp-BE | 1059 --- MOVN.S ---
1076 --- MOVN.D ---
|
| D | move_instructions.stdout.exp-LE | 1059 --- MOVN.S ---
1076 --- MOVN.D ---
|
| /external/v8/src/mips/ |
| D | constants-mips.cc | 253 case MOVN: in InstructionType()
|
| D | constants-mips.h | 383 MOVN = ((1 << 3) + 3), enumerator
|
| D | disasm-mips.cc | 795 case MOVN: in DecodeTypeRegister()
|
| D | simulator-mips.cc | 2073 case MOVN: in ConfigureTypeRegister()
2621 case MOVN: in DecodeTypeRegister()
|
| D | assembler-mips.cc | 1903 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVN); in movn()
|
| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 270 case MOVN: in InstructionType()
|
| D | constants-mips64.h | 360 MOVN = ((1 << 3) + 3), enumerator
|
| D | disasm-mips64.cc | 922 case MOVN: in DecodeTypeRegister()
|
| D | simulator-mips64.cc | 2196 case MOVN: in ConfigureTypeRegister()
2739 case MOVN: in DecodeTypeRegister()
|
| D | assembler-mips64.cc | 2098 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVN); in movn()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64Schedule.td | 21 def WriteImm : SchedWrite; // MOVN, MOVZ
|
| D | AArch64SchedCyclone.td | 128 // MOVN,MOVZ,MOVK
|
| D | AArch64InstrInfo.td | 405 defm MOVN : MoveImmediate<0b00, "movn">;
469 defm : movw_mov_alias<"MOVN", MOVNWi, GPR32, 32, 0>;
470 defm : movw_mov_alias<"MOVN", MOVNWi, GPR32, 32, 16>;
472 defm : movw_mov_alias<"MOVN", MOVNXi, GPR64, 64, 0>;
473 defm : movw_mov_alias<"MOVN", MOVNXi, GPR64, 64, 16>;
474 defm : movw_mov_alias<"MOVN", MOVNXi, GPR64, 64, 32>;
475 defm : movw_mov_alias<"MOVN", MOVNXi, GPR64, 64, 48>;
|
| /external/v8/src/arm64/ |
| D | constants-arm64.h | 561 MOVN = 0x00000000, enumerator
564 MOVN_w = MoveWideImmediateFixed | MOVN,
565 MOVN_x = MoveWideImmediateFixed | MOVN | SixtyFourBits,
|
| D | assembler-arm64.h | 1523 MoveWide(rd, imm, shift, MOVN);
|
| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_64.c | 100 #define MOVN 0x92800000 macro
424 return push_inst(compiler, MOVN | RD(dst) | ((~imm & 0xffff) << 5)); in load_immediate()
428 return push_inst(compiler, (MOVN ^ W_OP) | RD(dst) | ((~imm & 0xffff) << 5)); in load_immediate()
430 …return push_inst(compiler, (MOVN ^ W_OP) | RD(dst) | ((~imm & 0xffff0000l) >> (16 - 5)) | (1 << 21… in load_immediate()
447 FAIL_IF(push_inst(compiler, MOVN | RD(dst) | ((~imm & 0xffff) << 5))); in load_immediate()
475 FAIL_IF(push_inst(compiler, MOVN | RD(dst) | ((simm & 0xffff) << 5) | (i << 21))); in load_immediate()
|
| /external/vixl/src/vixl/a64/ |
| D | constants-a64.h | 585 MOVN = 0x00000000, enumerator
588 MOVN_w = MoveWideImmediateFixed | MOVN,
589 MOVN_x = MoveWideImmediateFixed | MOVN | SixtyFourBits,
|
| D | assembler-a64.h | 1864 MoveWide(rd, imm, shift, MOVN);
|
| /external/valgrind/none/tests/mips32/ |
| D | MoveIns.stdout.exp-BE | 192 MOVN.S
209 MOVN.D
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 805 ### MOVN ### subsection
|