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Searched refs:MemSDNode (Results 1 – 19 of 19) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsISelDAGToDAG.cpp213 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= in Select()
214 cast<MemSDNode>(Node)->getAlignment()) && in Select()
/external/llvm/include/llvm/CodeGen/
DSelectionDAGNodes.h1045 class MemSDNode : public SDNode {
1055 MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
1058 MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
1160 class AtomicSDNode : public MemSDNode {
1200 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1209 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1218 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1227 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1276 class MemIntrinsicSDNode : public MemSDNode {
1281 : MemSDNode(Opc, Order, dl, VTs, Ops, MemoryVT, MMO) {
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/external/llvm/lib/Target/R600/
DAMDGPUInstructions.td154 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS;
329 return cast<MemSDNode>(N)->getAlignment() % 8 == 0;
343 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
361 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
392 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::FLAT_ADDRESS;
398 [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]
DSIISelLowering.cpp1756 MemSDNode *MemNode = cast<MemSDNode>(N); in PerformDAGCombine()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp527 static unsigned int getCodeAddrSpace(MemSDNode *N) { in getCodeAddrSpace()
847 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectLoad()
862 MemSDNode *MemSD = cast<MemSDNode>(N); in SelectLoadVector()
1229 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectLoadVector()
1239 MemSDNode *Mem; in SelectLDGLDU()
1264 Mem = cast<MemSDNode>(N); in SelectLDGLDU()
2212 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectStore()
2227 MemSDNode *MemSD = cast<MemSDNode>(N); in SelectStoreVector()
2587 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectStoreVector()
2598 MemSDNode *Mem = cast<MemSDNode>(Node); in SelectLoadParam()
[all …]
DNVPTXISelLowering.cpp1890 MemSDNode *MemSD = cast<MemSDNode>(N); in LowerSTOREVector()
3989 MemSDNode *Mem = dyn_cast<MemSDNode>(Val); in PerformANDCombine()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp492 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { in print_details()
DSelectionDAG.cpp544 const MemSDNode *PF = cast<MemSDNode>(N); in AddNodeIDCustom()
567 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); in AddNodeIDCustom()
6372 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, in MemSDNode() function in MemSDNode
6386 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, in MemSDNode() function in MemSDNode
DSelectionDAGISel.cpp2812 MatchedMemRefs.push_back(cast<MemSDNode>(N)->getMemOperand()); in SelectCodeCommon()
DLegalizeDAG.cpp2951 Node->getOperand(3), cast<MemSDNode>(Node)->getMemOperand(), in ExpandNode()
DDAGCombiner.cpp13410 if (isa<MemIntrinsicSDNode>(*UI) || isa<MemSDNode>(*UI)) { in GatherAllAliases()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp363 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in SelectIndexedBinOp()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp437 if (isa<MemSDNode>(Chain.getNode()) && in isCalleeLoad()
438 cast<MemSDNode>(Chain.getNode())->writeMem()) in isCalleeLoad()
1340 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in SelectAddr()
1862 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadArith()
DX86InstrFragmentsSIMD.td418 return cast<MemSDNode>(N)->getAlignment() >= 16;
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp591 if (cast<MemSDNode>(Use)->getOrdering() > Monotonic) in isWorthFoldingADDlow()
754 if (!isa<MemSDNode>(*UI)) in SelectAddrModeWRO()
835 if (!isa<MemSDNode>(*UI)) in SelectAddrModeXRO()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp996 MemSDNode *MemN = cast<MemSDNode>(Parent); in SelectAddrMode6()
DARMISelLowering.cpp8760 MemSDNode *MemN = cast<MemSDNode>(N); in CombineBaseUpdate()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp9078 if (MemSDNode *ChainLD = dyn_cast<MemSDNode>(ChainNext)) { in findConsecutiveLoad()
9109 if (MemSDNode *ChainLD = dyn_cast<MemSDNode>(LoadRoot)) in findConsecutiveLoad()
9115 if (((isa<MemSDNode>(*UI) && in findConsecutiveLoad()
9116 cast<MemSDNode>(*UI)->getChain().getNode() == LoadRoot) || in findConsecutiveLoad()
DPPCISelDAGToDAG.cpp2339 MemOp[0] = cast<MemSDNode>(N)->getMemOperand(); in transferMemOperands()