Searched refs:REGIMM (Results 1 – 10 of 10) sorted by relevance
/external/v8/src/mips/ |
D | constants-mips.cc | 145 case REGIMM: in IsForbiddenInBranchDelay() 176 case REGIMM: in IsLinkingInstruction() 291 case REGIMM: in InstructionType()
|
D | constants-mips.h | 315 REGIMM = 1 << kOpcodeShift, enumerator 881 case REGIMM: in SecondaryValue()
|
D | assembler-mips.cc | 508 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || in IsBranch() 1183 GenInstrImmediate(REGIMM, rs, BGEZ, offset); in bgez() 1217 GenInstrImmediate(REGIMM, rs, BGEZAL, offset); in bgezal() 1277 GenInstrImmediate(REGIMM, rs, BLTZ, offset); in bltz() 1286 GenInstrImmediate(REGIMM, rs, BLTZAL, offset); in bltzal() 1331 GenInstrImmediate(REGIMM, rs, BGEZALL, offset); in bgezall()
|
D | disasm-mips.cc | 1012 case REGIMM: in DecodeTypeImmediate()
|
D | simulator-mips.cc | 2759 case REGIMM: in DecodeTypeImmediate()
|
/external/v8/src/mips64/ |
D | constants-mips64.cc | 145 case REGIMM: in IsForbiddenInBranchDelay() 176 case REGIMM: in IsLinkingInstruction() 308 case REGIMM: in InstructionType()
|
D | constants-mips64.h | 280 REGIMM = 1 << kOpcodeShift, enumerator 895 case REGIMM: in SecondaryValue()
|
D | assembler-mips64.cc | 486 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || in IsBranch() 1162 GenInstrImmediate(REGIMM, rs, BGEZ, offset); in bgez() 1196 GenInstrImmediate(REGIMM, rs, BGEZAL, offset); in bgezal() 1256 GenInstrImmediate(REGIMM, rs, BLTZ, offset); in bltz() 1265 GenInstrImmediate(REGIMM, rs, BLTZAL, offset); in bltzal() 1310 GenInstrImmediate(REGIMM, rs, BGEZALL, offset); in bgezall() 1925 GenInstrImmediate(REGIMM, rs, DAHI, j); in dahi() 1931 GenInstrImmediate(REGIMM, rs, DATI, j); in dati()
|
D | disasm-mips64.cc | 1132 case REGIMM: in DecodeTypeImmediate()
|
D | simulator-mips64.cc | 2888 case REGIMM: in DecodeTypeImmediate()
|