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Searched refs:SRAV (Results 1 – 20 of 20) sorted by relevance

/external/valgrind/none/tests/mips64/
Dshift_instructions.c10 SRA, SRAV, SRL, SRLV enumerator
184 case SRAV: in main()
/external/v8/src/mips/
Dconstants-mips.cc229 case SRAV: in InstructionType()
Dconstants-mips.h378 SRAV = ((0 << 3) + 7), enumerator
Ddisasm-mips.cc672 case SRAV: in DecodeTypeRegister()
Dsimulator-mips.cc1958 case SRAV: in ConfigureTypeRegister()
Dassembler-mips.cc1631 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRAV); in srav()
/external/v8/src/mips64/
Dconstants-mips64.cc237 case SRAV: in InstructionType()
Dconstants-mips64.h355 SRAV = ((0 << 3) + 7), enumerator
Ddisasm-mips64.cc751 case SRAV: in DecodeTypeRegister()
Dsimulator-mips64.cc2063 case SRAV: in ConfigureTypeRegister()
Dassembler-mips64.cc1695 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRAV); in srav()
/external/pcre/dist/sljit/
DsljitNativeMIPS_32.c336 EMIT_SHIFT(SRA, SRAV); in emit_single_op()
DsljitNativeMIPS_64.c431 EMIT_SHIFT(DSRA, DSRA32, SRA, DSRAV, SRAV); in emit_single_op()
DsljitNativeMIPS_common.c170 #define SRAV (HI(0) | LO(7)) macro
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td1178 def SRAV : MMRel, shift_rotate_reg<"srav", GPR32Opnd, II_SRAV, sra>,
1637 (SRAV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
DMips16InstrInfo.td1234 // Format: SRAV ry, rx MIPS16e
/external/valgrind/none/tests/mips32/
DMIPS32int.stdout.exp-mips32-BE853 SRAV
DMIPS32int.stdout.exp-mips32-LE853 SRAV
DMIPS32int.stdout.exp-mips32r2-LE1331 SRAV
DMIPS32int.stdout.exp-mips32r2-BE1331 SRAV