Searched refs:SWC1 (Results 1 – 20 of 20) sorted by relevance
/external/v8/src/mips/ |
D | constants-mips.cc | 325 case SWC1: in InstructionType()
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D | constants-mips.h | 363 SWC1 = ((7 << 3) + 1) << kOpcodeShift, enumerator
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D | assembler-mips.cc | 1986 GenInstrImmediate(SWC1, src.rm(), fd, src.offset_); in swc1() 1994 GenInstrImmediate(SWC1, src.rm(), fd, src.offset_ + in sdc1() 2000 GenInstrImmediate(SWC1, src.rm(), fd, src.offset_ + in sdc1() 2004 GenInstrImmediate(SWC1, src.rm(), nextfpreg, src.offset_ + in sdc1()
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D | disasm-mips.cc | 1214 case SWC1: in DecodeTypeImmediate()
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D | simulator-mips.cc | 2921 case SWC1: in DecodeTypeImmediate() 2994 case SWC1: in DecodeTypeImmediate()
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/external/v8/src/mips64/ |
D | constants-mips64.cc | 346 case SWC1: in InstructionType()
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D | constants-mips64.h | 338 SWC1 = ((7 << 3) + 1) << kOpcodeShift, enumerator
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D | disasm-mips64.cc | 1363 case SWC1: in DecodeTypeImmediate()
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D | simulator-mips64.cc | 3069 case SWC1: in DecodeTypeImmediate() 3150 case SWC1: in DecodeTypeImmediate()
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D | assembler-mips64.cc | 2217 GenInstrImmediate(SWC1, src.rm(), fd, src.offset_); in swc1()
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/external/valgrind/none/tests/mips32/ |
D | vfp.stdout.exp-mips32-BE | 72 SWC1
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D | vfp.stdout.exp-mips32-LE | 72 SWC1
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D | vfp.stdout.exp-mips32r2-BE | 153 SWC1
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D | vfp.stdout.exp-mips32r2-LE | 153 SWC1
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 230 case Mips::SWC1: in isBasePlusOffsetMemoryAccess()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEInstrInfo.cpp | 68 (Opc == Mips::SWC1) || (Opc == Mips::SDC1) || (Opc == Mips::SDC164)) { in isStoreToStackSlot() 203 Opc = Mips::SWC1; in storeRegToStack()
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D | MipsInstrFPU.td | 393 def SWC1 : MMRel, SW_FT<"swc1", FGR32Opnd, II_SWC1, store>, LW_FM<0x39>; 632 def : StoreRegImmPat<SWC1, f32>;
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D | MipsFastISel.cpp | 698 Opc = Mips::SWC1; in emitStore()
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/external/valgrind/none/tests/mips64/ |
D | fpu_load_store.stdout.exp-LE | 2438 --- SWC1 ---
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D | fpu_load_store.stdout.exp-BE | 2438 --- SWC1 ---
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