Searched refs:SrcIsKill (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 467 bool SrcIsKill = MI.getOperand(OpIdx).isKill(); in ExpandVST() local
484 if (SrcIsKill && !SrcIsUndef) // Add an implicit kill for the super-reg. in ExpandVST()
600 bool SrcIsKill = MI.getOperand(OpIdx).isKill(); in ExpandVTBL() local
614 MIB.addReg(SrcReg, RegState::Implicit | getKillRegState(SrcIsKill)); in ExpandVTBL()
1122 bool SrcIsKill = MI.getOperand(OpIdx).isKill(); in ExpandMI() local
1135 MIB.addReg(D0, SrcIsKill ? RegState::Kill : 0) in ExpandMI()
1136 .addReg(D1, SrcIsKill ? RegState::Kill : 0); in ExpandMI()
1138 if (SrcIsKill) // Add an implicit kill for the Q register. in ExpandMI()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 2209 bool SrcIsKill = hasTrivialKill(LHS); in emitCompareAndBranch() local
2212 SrcReg = fastEmitInst_extractsubreg(MVT::i32, SrcReg, SrcIsKill, in emitCompareAndBranch()
2222 .addReg(SrcReg, getKillRegState(SrcIsKill)); in emitCompareAndBranch()
2785 bool SrcIsKill = hasTrivialKill(I->getOperand(0)); in selectIntToFP() local
2795 SrcIsKill = true; in selectIntToFP()
2812 SrcIsKill); in selectIntToFP()
3775 bool SrcIsKill = hasTrivialKill(Op); in selectTrunc() local
3800 unsigned Reg32 = fastEmitInst_extractsubreg(MVT::i32, SrcReg, SrcIsKill, in selectTrunc()
3809 .addReg(SrcReg, getKillRegState(SrcIsKill)); in selectTrunc()
4405 bool SrcIsKill = hasTrivialKill(I->getOperand(0)); in selectIntExt() local
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