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Searched refs:Srl_imm (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1380 uint64_t Srl_imm = 0; in isBitfieldExtractOpFromAnd() local
1383 isOpcWithIntImmediate(Op0->getOperand(0).getNode(), ISD::SRL, Srl_imm)) { in isBitfieldExtractOpFromAnd()
1391 Srl_imm)) { in isBitfieldExtractOpFromAnd()
1397 } else if (isOpcWithIntImmediate(Op0, ISD::SRL, Srl_imm)) { in isBitfieldExtractOpFromAnd()
1411 if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) { in isBitfieldExtractOpFromAnd()
1417 LSB = Srl_imm; in isBitfieldExtractOpFromAnd()
1418 MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(And_imm) in isBitfieldExtractOpFromAnd()
1458 uint64_t Srl_imm = 0; in isSeveralBitsExtractOpFromShr() local
1459 if (!isIntImmediate(N->getOperand(1), Srl_imm)) in isSeveralBitsExtractOpFromShr()
1463 unsigned BitWide = 64 - countLeadingOnes(~(And_mask >> Srl_imm)); in isSeveralBitsExtractOpFromShr()
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/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp375 unsigned Srl_imm = 0; in PreprocessISelDAG() local
376 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) || in PreprocessISelDAG()
377 (Srl_imm <= 2)) in PreprocessISelDAG()
397 CurDAG->getConstant(Srl_imm+TZ, MVT::i32)); in PreprocessISelDAG()
2305 unsigned Srl_imm = 0; in SelectV6T2BitfieldExtractOp() local
2307 Srl_imm)) { in SelectV6T2BitfieldExtractOp()
2308 assert(Srl_imm > 0 && Srl_imm < 32 && "bad amount in shift node!"); in SelectV6T2BitfieldExtractOp()
2312 unsigned LSB = Srl_imm; in SelectV6T2BitfieldExtractOp()
2350 unsigned Srl_imm = 0; in SelectV6T2BitfieldExtractOp() local
2351 if (isInt32Immediate(N->getOperand(1), Srl_imm)) { in SelectV6T2BitfieldExtractOp()
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