Searched refs:TGEU (Results 1 – 11 of 11) sorted by relevance
/external/v8/src/mips/ |
D | constants-mips.cc | 204 case TGEU: in IsTrap() 247 case TGEU: in InstructionType()
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D | disasm-mips.cc | 276 case TGEU: in PrintCode() 777 case TGEU: in DecodeTypeRegister()
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D | constants-mips.h | 409 TGEU = ((6 << 3) + 1), enumerator
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D | simulator-mips.cc | 2058 case TGEU: in ConfigureTypeRegister() 2611 case TGEU: in DecodeTypeRegister()
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D | assembler-mips.cc | 1824 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift in tgeu()
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/external/v8/src/mips64/ |
D | constants-mips64.cc | 204 case TGEU: in IsTrap() 264 case TGEU: in InstructionType()
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D | disasm-mips64.cc | 277 case TGEU: in PrintCode() 904 case TGEU: in DecodeTypeRegister()
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D | constants-mips64.h | 397 TGEU = ((6 << 3) + 1), enumerator
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D | simulator-mips64.cc | 2181 case TGEU: in ConfigureTypeRegister() 2729 case TGEU: in DecodeTypeRegister()
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D | assembler-mips64.cc | 2019 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift in tgeu()
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 1246 def TGEU : MMRel, TEQ_FT<"tgeu", GPR32Opnd>, TEQ_FM<0x31>, ISA_MIPS2; 1615 (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0), 1>, ISA_MIPS2;
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