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Searched refs:clc (Results 1 – 25 of 28) sorted by relevance

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/external/llvm/test/CodeGen/SystemZ/
Dmemcmp-01.ll19 ; CHECK: clc 0(2,%r2), 0(%r3)
31 ; CHECK: clc 0(3,%r2), 0(%r3)
49 ; CHECK: clc 0(4,%r2), 0(%r3)
68 ; CHECK: clc 0(5,%r2), 0(%r3)
87 ; CHECK: clc 0(6,%r2), 0(%r3)
107 ; CHECK: clc 0(256,%r2), 0(%r3)
129 ; CHECK: clc 0(256,%r2), 0(%r3)
131 ; CHECK: clc 256(1,%r2), 256(%r3)
142 ; CHECK: clc 0(256,%r2), 0(%r3)
144 ; CHECK: clc 256(1,%r2), 256(%r3)
[all …]
Dmemcmp-02.ll19 ; CHECK: clc 0(2,%r2), 0(%r3)
32 ; CHECK: clc 0(3,%r2), 0(%r3)
50 ; CHECK: clc 0(4,%r2), 0(%r3)
69 ; CHECK: clc 0(5,%r2), 0(%r3)
88 ; CHECK: clc 0(6,%r2), 0(%r3)
108 ; CHECK: clc 0(256,%r2), 0(%r3)
131 ; CHECK: clc 0(256,%r2), 0(%r3)
133 ; CHECK: clc 256(1,%r2), 256(%r3)
/external/valgrind/none/tests/s390x/
Dclc.c11 static int clc(char *a1,char *a2, int l) in clc() function
31 cc = clc(a1, a2, l); in testrun()
Dclc.vgtest1 prog: clc
DMakefile.am5 INSN_TESTS = clc clcle cvb cvd icm lpr tcxb lam_stam xc mvst add sub mul \
/external/valgrind/none/tests/amd64/
DMakefile.am40 clc.vgtest clc.stdout.exp clc.stderr.exp \
92 clc \ program
Dclc.vgtest1 prog: clc
Dinsn_basic.def228 ###clc eflags[0x001,0x000] : => eflags[0x001,0x000]
229 ###clc eflags[0x001,0x001] : => eflags[0x001,0x000]
/external/llvm/test/MC/SystemZ/
Dinsn-bad.s759 #CHECK: clc 0, 0
761 #CHECK: clc 0(%r1), 0(%r1)
763 #CHECK: clc 0(1,%r1), 0(2,%r1)
765 #CHECK: clc 0(0,%r1), 0(%r1)
767 #CHECK: clc 0(257,%r1), 0(%r1)
769 #CHECK: clc -1(1,%r1), 0(%r1)
771 #CHECK: clc 4096(1,%r1), 0(%r1)
773 #CHECK: clc 0(1,%r1), -1(%r1)
775 #CHECK: clc 0(1,%r1), 4096(%r1)
777 #CHECK: clc 0(1,%r0), 0(%r1)
[all …]
Dinsn-good.s2548 #CHECK: clc 0(1), 0 # encoding: [0xd5,0x00,0x00,0x00,0x00,0x00]
2549 #CHECK: clc 0(1), 0(%r1) # encoding: [0xd5,0x00,0x00,0x00,0x10,0x00]
2550 #CHECK: clc 0(1), 0(%r15) # encoding: [0xd5,0x00,0x00,0x00,0xf0,0x00]
2551 #CHECK: clc 0(1), 4095 # encoding: [0xd5,0x00,0x00,0x00,0x0f,0xff]
2552 #CHECK: clc 0(1), 4095(%r1) # encoding: [0xd5,0x00,0x00,0x00,0x1f,0xff]
2553 #CHECK: clc 0(1), 4095(%r15) # encoding: [0xd5,0x00,0x00,0x00,0xff,0xff]
2554 #CHECK: clc 0(1,%r1), 0 # encoding: [0xd5,0x00,0x10,0x00,0x00,0x00]
2555 #CHECK: clc 0(1,%r15), 0 # encoding: [0xd5,0x00,0xf0,0x00,0x00,0x00]
2556 #CHECK: clc 4095(1,%r1), 0 # encoding: [0xd5,0x00,0x1f,0xff,0x00,0x00]
2557 #CHECK: clc 4095(1,%r15), 0 # encoding: [0xd5,0x00,0xff,0xff,0x00,0x00]
[all …]
/external/llvm/test/DebugInfo/X86/
Ddbg-value-dag-combine.ll29 !2 = !MDCompileUnit(language: DW_LANG_C89, producer: "clc", isOptimized: false, emissionKind: 1, fi…
Ddbg-value-isel.ll86 !2 = !MDCompileUnit(language: DW_LANG_C89, producer: "clc", isOptimized: false, emissionKind: 1, fi…
/external/valgrind/docs/internals/
D3_1_BUGSTATUS.txt44 vx1613 fixed 125651 amd64->IR: 0xF8 0x49 0xFF 0xE3 (clc?)
Ds390-opcodes.csv39 clc,"compare logical",implemented,
/external/llvm/test/MC/Disassembler/SystemZ/
Dinsns.txt1519 # CHECK: clc 0(1), 0
1522 # CHECK: clc 0(1), 0(%r1)
1525 # CHECK: clc 0(1), 0(%r15)
1528 # CHECK: clc 0(1), 4095
1531 # CHECK: clc 0(1), 4095(%r1)
1534 # CHECK: clc 0(1), 4095(%r15)
1537 # CHECK: clc 0(1,%r1), 0
1540 # CHECK: clc 0(1,%r15), 0
1543 # CHECK: clc 4095(1,%r1), 0
1546 # CHECK: clc 4095(1,%r15), 0
[all …]
/external/mesa3d/src/mesa/x86/
Dassyntax.h412 #define CLC CHOICE(clc, clc, clc)
1148 #define CLC clc
/external/v8/src/x64/
Dassembler-x64.h862 void clc();
Dassembler-x64.cc733 void Assembler::clc() { in clc() function in v8::internal::Assembler
/external/valgrind/none/tests/x86/
Dinsn_basic.def178 clc eflags[0x001,0x000] : => eflags[0x001,0x000]
179 clc eflags[0x001,0x001] : => eflags[0x001,0x000]
/external/elfutils/src/libcpu/defs/
Di386121 11111000:clc
/external/llvm/test/MC/X86/
Dx86-32-coverage.s245 clc
/external/valgrind/perf/
Dtinycc.c3122 DEF_ASM_OP0(clc, 0xf8)
3579 DEF_ASM_OP0(clc, 0xf8)
4454 DEF_ASM_OP0(clc, 0xf8)
4911 DEF_ASM_OP0(clc, 0xf8)
15161 DEF_ASM_OP0(clc, 0xf8)
15623 DEF_ASM_OP0(clc, 0xf8)
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td1185 defm CLC : MemorySS<"clc", 0xD5, z_clc, z_clc_loop>;
/external/valgrind/
DNEWS.old640 125651 amd64->IR: 0xF8 0x49 0xFF 0xE3 (clc?)
/external/llvm/lib/Target/X86/
DX86InstrInfo.td1878 def CLC : I<0xF8, RawFrm, (outs), (ins), "clc", [], IIC_CLC>;

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