| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-fp-compare.s | 95 fcmlt s10, s11, #0.0
96 fcmlt d20, d21, #0.0
97 fcmlt s10, s11, #0
98 fcmlt d20, d21, #0x0
|
| D | neon-compare-instructions.s | 234 fcmlt v0.2s, v16.2s, v31.2s
235 fcmlt v4.4s, v15.4s, v7.4s
236 fcmlt v29.2d, v5.2d, v2.2d
414 fcmlt v16.2s, v2.2s, #0.0
415 fcmlt v15.4s, v4.4s, #0.0
416 fcmlt v5.2d, v29.2d, #0.0
417 fcmlt v16.2s, v2.2s, #0
418 fcmlt v15.4s, v4.4s, #0
419 fcmlt v5.2d, v29.2d, #0
|
| D | arm64-aliases.s | 617 fcmlt.2s v0, v2, v1
618 fcmlt.4s v0, v2, v1
619 fcmlt.2d v0, v2, v1
659 fcmlt s0, s2, s1
660 fcmlt d0, d2, d1 define
|
| D | neon-diagnostics.s | 585 fcmlt v29.2d, v5.2d, v2.16b
724 fcmlt v29.2d, v5.2d, #255.0
725 fcmlt v29.2d, v5.2d, #255
772 fcmlt v29.2d, v5.2d, #16.0
773 fcmlt v29.2d, v5.2d, #2
4705 fcmlt h10, s11, #0.0
4706 fcmlt d20, s21, #0.0
|
| D | arm64-advsimd.s | 596 fcmlt.2s v0, v0, #0
615 ; CHECK: fcmlt.2s v0, v0, #0.0 ; encoding: [0x00,0xe8,0xa0,0x0e]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | neon-compare-instructions.ll | 1829 ; CHECK: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}}
1837 ; CHECK: fcmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}}
1845 ; CHECK: fcmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}}
1879 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}}
1890 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}}
1900 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}}
1911 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}}
1922 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}}
1932 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}}
1943 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}}
[all …]
|
| D | arm64-vcmp.ll | 6 ;CHECK: fcmlt.4s [[REG:v[0-9]+]], v0, #0
|
| D | arm64-neon-compare-instructions.ll | 1187 ; CHECK: fcmlt d0, d0, #0
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2559 defm FCMLT : SIMDFPCmpTwoVector<0, 1, 0b01110, "fcmlt", AArch64fcmltz>;
2946 def : InstAlias<"{fcmlt\t$dst.2s, $src1.2s, $src2.2s" #
2947 "|fcmlt.2s\t$dst, $src1, $src2}",
2949 def : InstAlias<"{fcmlt\t$dst.4s, $src1.4s, $src2.4s" #
2950 "|fcmlt.4s\t$dst, $src1, $src2}",
2952 def : InstAlias<"{fcmlt\t$dst.2d, $src1.2d, $src2.2d" #
2953 "|fcmlt.2d\t$dst, $src1, $src2}",
3042 def : InstAlias<"fcmlt $dst, $src1, $src2",
3044 def : InstAlias<"fcmlt $dst, $src1, $src2",
3086 defm FCMLT : SIMDCmpTwoScalarSD<0, 1, 0b01110, "fcmlt", AArch64fcmltz>;
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 302 # CHECK: fcmlt v12.4s, v25.4s, #0.0
1678 # CHECK: fcmlt s10, s11, #0.0
1679 # CHECK: fcmlt d20, d21, #0.0
|
| D | arm64-advsimd.txt | 542 # CHECK: fcmlt.2s v0, v0, #0
|
| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3948 DEFINE_TEST_NEON_2OPIMM_FCMP_ZERO(fcmlt, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4002 DEFINE_TEST_NEON_2OPIMM_FP_SCALAR_SD(fcmlt, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
|
| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 2312 V(fcmlt, Fcmlt) in NEON_2VREG_MACRO_LIST()
|
| D | assembler-a64.h | 3600 void fcmlt(const VRegister& vd,
|
| D | assembler-a64.cc | 3153 void Assembler::fcmlt(const VRegister& vd, in fcmlt() function in vixl::Assembler
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 1810 void fcmlt(const VRegister& vd,
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 19876 fcmlt v2.2d, v23.2d, #0 cfb006185cc94b8267b355b84b944dc9 83a4def5ad58bbae42f6d1d1a4e697b1 fffff…
19877 fcmlt v2.4s, v23.4s, #0 3238a9dbbd87629234083df5c5b663dc 7e16bd949e8c348110a1f650871aff9c 00000…
19878 fcmlt v2.2s, v23.2s, #0 c70cf214f27d727357dd4fbcf704b693 e3edbb021a8f9dfd6be6bfb1da119c04 00000…
|