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Searched refs:hash_e (Results 1 – 4 of 4) sorted by relevance

/external/clang/test/CodeGen/
Darm64_crypto.c30 uint32x4_t test_sha1c(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_sha1c() argument
34 return vsha1cq_u32(hash_abcd, hash_e, wk); in test_sha1c()
37 uint32x4_t test_sha1p(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_sha1p() argument
41 return vsha1pq_u32(hash_abcd, hash_e, wk); in test_sha1p()
44 uint32x4_t test_sha1m(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_sha1m() argument
48 return vsha1mq_u32(hash_abcd, hash_e, wk); in test_sha1m()
51 uint32_t test_sha1h(uint32_t hash_e) { in test_sha1h() argument
56 return vsha1h_u32(hash_e); in test_sha1h()
Dneon-crypto.c38 uint32_t test_vsha1h_u32(uint32_t hash_e) { in test_vsha1h_u32() argument
40 return vsha1h_u32(hash_e); in test_vsha1h_u32()
56 uint32x4_t test_vsha1cq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_vsha1cq_u32() argument
58 return vsha1cq_u32(hash_abcd, hash_e, wk); in test_vsha1cq_u32()
62 uint32x4_t test_vsha1pq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_vsha1pq_u32() argument
64 return vsha1pq_u32(hash_abcd, hash_e, wk); in test_vsha1pq_u32()
68 uint32x4_t test_vsha1mq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_vsha1mq_u32() argument
70 return vsha1mq_u32(hash_abcd, hash_e, wk); in test_vsha1mq_u32()
/external/llvm/test/CodeGen/AArch64/
Darm64-crypto.ll36 declare <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
37 declare <4 x i32> @llvm.aarch64.crypto.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
38 declare <4 x i32> @llvm.aarch64.crypto.sha1m(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
39 declare i32 @llvm.aarch64.crypto.sha1h(i32 %hash_e)
43 define <4 x i32> @test_sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {
47 %res = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
52 define <4 x i32> @test_sha1c_in_a_row(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {
58 %res = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
64 define <4 x i32> @test_sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) {
68 %res = call <4 x i32> @llvm.aarch64.crypto.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td6255 def : Pat<(v4i32 (int_arm_neon_sha1c v4i32:$hash_abcd, i32:$hash_e, v4i32:$wk)),
6258 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)),
6262 def : Pat<(v4i32 (int_arm_neon_sha1m v4i32:$hash_abcd, i32:$hash_e, v4i32:$wk)),
6265 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)),
6269 def : Pat<(v4i32 (int_arm_neon_sha1p v4i32:$hash_abcd, i32:$hash_e, v4i32:$wk)),
6272 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)),