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Searched refs:ldaxr (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/CodeGen/AArch64/
Darm64-ldxr-stxr.ll179 %val = call i64 @llvm.aarch64.ldaxr.p0i8(i8* %addr)
193 %val = call i64 @llvm.aarch64.ldaxr.p0i16(i16* %addr)
202 ; CHECK: ldaxr w[[LOADVAL:[0-9]+]], [x0]
207 %val = call i64 @llvm.aarch64.ldaxr.p0i32(i32* %addr)
216 ; CHECK: ldaxr x[[LOADVAL:[0-9]+]], [x0]
219 %val = call i64 @llvm.aarch64.ldaxr.p0i64(i64* %addr)
225 declare i64 @llvm.aarch64.ldaxr.p0i8(i8*) nounwind
226 declare i64 @llvm.aarch64.ldaxr.p0i16(i16*) nounwind
227 declare i64 @llvm.aarch64.ldaxr.p0i32(i32*) nounwind
228 declare i64 @llvm.aarch64.ldaxr.p0i64(i64*) nounwind
Dcmpxchg-idioms.ll7 ; CHECK: ldaxr [[LOADED:w[0-9]+]], [x0]
62 ; CHECK: ldaxr [[LOADED:w[0-9]+]], [x0]
Datomic-ops.ll143 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
163 ; ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
223 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
243 ; ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
303 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
383 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
480 ; ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
573 ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
743 ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
767 ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
[all …]
Darm64-atomic.ll7 ; CHECK: ldaxr [[RESULT:w[0-9]+]], [x0]
52 ; CHECK: ldaxr x[[DEST_REG:[0-9]+]], [x[[ADDR]]]
66 ; CHECK: ldaxr w[[DEST_REG:[0-9]+]], [x0]
/external/llvm/test/MC/AArch64/
Darm64-memory.s510 ldaxr w2, [x4]
511 ldaxr x2, [x4]
517 ; CHECK: ldaxr w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x88]
518 ; CHECK: ldaxr x2, [x4] ; encoding: [0x82,0xfc,0x5f,0xc8]
Dbasic-a64-instructions.s2283 ldaxr wzr, [x22]
2284 ldaxr x21, [x23]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-memory.txt498 # CHECK: ldaxr w2, [x4]
499 # CHECK: ldaxr x2, [x4]
Dbasic-a64-instructions.txt1854 #CHECK: ldaxr w6, [sp]
1855 #CHECK: ldaxr x5, [x6]
1856 #CHECK: ldaxr x5, [x6]
1857 #CHECK: ldaxr x5, [x6]
/external/vixl/
DREADME.md110 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
/external/vixl/test/
Dtest-disasm-a64.cc1785 COMPARE(ldaxr(w21, MemOperand(x22)), "ldaxr w21, [x22]"); in TEST()
1786 COMPARE(ldaxr(w23, MemOperand(sp)), "ldaxr w23, [sp]"); in TEST()
1787 COMPARE(ldaxr(x24, MemOperand(x25)), "ldaxr x24, [x25]"); in TEST()
1788 COMPARE(ldaxr(x26, MemOperand(sp)), "ldaxr x26, [sp]"); in TEST()
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h1440 ldaxr(rt, src); in Ldaxr()
Dassembler-a64.h1804 void ldaxr(const Register& rt, const MemOperand& src);
Dassembler-a64.cc1779 void Assembler::ldaxr(const Register& rt, in ldaxr() function in vixl::Assembler
/external/vixl/doc/
Dsupported-instructions.md554 void ldaxr(const Register& rt, const MemOperand& src)
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2280 def LDAXRW : LoadExclusive <0b10, 0, 1, 0, 1, GPR32, "ldaxr">;
2281 def LDAXRX : LoadExclusive <0b11, 0, 1, 0, 1, GPR64, "ldaxr">;