Searched refs:tile_config (Results 1 – 5 of 5) sorted by relevance
61 uint32_t tile_config; member345 info->tile_config = val; in radeon_init_tile_config()348 switch (info->tile_config & 0xf) { in radeon_init_tile_config()366 switch ((info->tile_config & 0xf0) >> 4) { in radeon_init_tile_config()381 switch ((info->tile_config & 0xf00) >> 8) { in radeon_init_tile_config()394 switch ((info->tile_config & 0xe) >> 1) { in radeon_init_tile_config()412 switch ((info->tile_config & 0x30) >> 4) { in radeon_init_tile_config()424 switch ((info->tile_config & 0xc0) >> 6) { in radeon_init_tile_config()
826 out->tile_config = 0; in r300_texture_setup_format_state()880 out->tile_config = R300_TXO_MACRO_TILE(desc->macrotile[level]) | in r300_texture_setup_format_state()
199 uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */ member
807 texstate->format.tile_config |= offset & 0xffffffe0; in r300_merge_textures_and_samplers()
813 OUT_CS_REG(R300_TX_OFFSET_0 + (i * 4), texstate->format.tile_config); in r300_emit_textures_state()