156 void Mips64Assembler::EmitFR(int opcode, int fmt, FpuRegister ft, FpuRegister fs, FpuRegister fd,  in EmitFR()
170 void Mips64Assembler::EmitFI(int opcode, int fmt, FpuRegister ft, uint16_t imm) {  in EmitFI()
626 void Mips64Assembler::Bc1eqz(FpuRegister ft, uint16_t imm16) {  in Bc1eqz()
630 void Mips64Assembler::Bc1nez(FpuRegister ft, uint16_t imm16) {  in Bc1nez()
689       Bc1eqz(static_cast<FpuRegister>(rs), imm16_21);  in EmitBcondc()
693       Bc1nez(static_cast<FpuRegister>(rs), imm16_21);  in EmitBcondc()
701 void Mips64Assembler::AddS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in AddS()
705 void Mips64Assembler::SubS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in SubS()
709 void Mips64Assembler::MulS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in MulS()
713 void Mips64Assembler::DivS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in DivS()
717 void Mips64Assembler::AddD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in AddD()
721 void Mips64Assembler::SubD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in SubD()
725 void Mips64Assembler::MulD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in MulD()
729 void Mips64Assembler::DivD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in DivD()
733 void Mips64Assembler::SqrtS(FpuRegister fd, FpuRegister fs) {  in SqrtS()
734   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x4);  in SqrtS()
737 void Mips64Assembler::SqrtD(FpuRegister fd, FpuRegister fs) {  in SqrtD()
738   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x4);  in SqrtD()
741 void Mips64Assembler::AbsS(FpuRegister fd, FpuRegister fs) {  in AbsS()
742   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x5);  in AbsS()
745 void Mips64Assembler::AbsD(FpuRegister fd, FpuRegister fs) {  in AbsD()
746   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x5);  in AbsD()
749 void Mips64Assembler::MovS(FpuRegister fd, FpuRegister fs) {  in MovS()
750   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x6);  in MovS()
753 void Mips64Assembler::MovD(FpuRegister fd, FpuRegister fs) {  in MovD()
754   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x6);  in MovD()
757 void Mips64Assembler::NegS(FpuRegister fd, FpuRegister fs) {  in NegS()
758   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x7);  in NegS()
761 void Mips64Assembler::NegD(FpuRegister fd, FpuRegister fs) {  in NegD()
762   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x7);  in NegD()
765 void Mips64Assembler::RoundLS(FpuRegister fd, FpuRegister fs) {  in RoundLS()
766   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x8);  in RoundLS()
769 void Mips64Assembler::RoundLD(FpuRegister fd, FpuRegister fs) {  in RoundLD()
770   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x8);  in RoundLD()
773 void Mips64Assembler::RoundWS(FpuRegister fd, FpuRegister fs) {  in RoundWS()
774   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0xc);  in RoundWS()
777 void Mips64Assembler::RoundWD(FpuRegister fd, FpuRegister fs) {  in RoundWD()
778   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0xc);  in RoundWD()
781 void Mips64Assembler::TruncLS(FpuRegister fd, FpuRegister fs) {  in TruncLS()
782   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x9);  in TruncLS()
785 void Mips64Assembler::TruncLD(FpuRegister fd, FpuRegister fs) {  in TruncLD()
786   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x9);  in TruncLD()
789 void Mips64Assembler::TruncWS(FpuRegister fd, FpuRegister fs) {  in TruncWS()
790   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0xd);  in TruncWS()
793 void Mips64Assembler::TruncWD(FpuRegister fd, FpuRegister fs) {  in TruncWD()
794   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0xd);  in TruncWD()
797 void Mips64Assembler::CeilLS(FpuRegister fd, FpuRegister fs) {  in CeilLS()
798   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0xa);  in CeilLS()
801 void Mips64Assembler::CeilLD(FpuRegister fd, FpuRegister fs) {  in CeilLD()
802   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0xa);  in CeilLD()
805 void Mips64Assembler::CeilWS(FpuRegister fd, FpuRegister fs) {  in CeilWS()
806   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0xe);  in CeilWS()
809 void Mips64Assembler::CeilWD(FpuRegister fd, FpuRegister fs) {  in CeilWD()
810   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0xe);  in CeilWD()
813 void Mips64Assembler::FloorLS(FpuRegister fd, FpuRegister fs) {  in FloorLS()
814   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0xb);  in FloorLS()
817 void Mips64Assembler::FloorLD(FpuRegister fd, FpuRegister fs) {  in FloorLD()
818   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0xb);  in FloorLD()
821 void Mips64Assembler::FloorWS(FpuRegister fd, FpuRegister fs) {  in FloorWS()
822   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0xf);  in FloorWS()
825 void Mips64Assembler::FloorWD(FpuRegister fd, FpuRegister fs) {  in FloorWD()
826   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0xf);  in FloorWD()
829 void Mips64Assembler::SelS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in SelS()
833 void Mips64Assembler::SelD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in SelD()
837 void Mips64Assembler::RintS(FpuRegister fd, FpuRegister fs) {  in RintS()
838   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x1a);  in RintS()
841 void Mips64Assembler::RintD(FpuRegister fd, FpuRegister fs) {  in RintD()
842   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x1a);  in RintD()
845 void Mips64Assembler::ClassS(FpuRegister fd, FpuRegister fs) {  in ClassS()
846   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x1b);  in ClassS()
849 void Mips64Assembler::ClassD(FpuRegister fd, FpuRegister fs) {  in ClassD()
850   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x1b);  in ClassD()
853 void Mips64Assembler::MinS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in MinS()
857 void Mips64Assembler::MinD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in MinD()
861 void Mips64Assembler::MaxS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in MaxS()
865 void Mips64Assembler::MaxD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in MaxD()
869 void Mips64Assembler::CmpUnS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUnS()
873 void Mips64Assembler::CmpEqS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpEqS()
877 void Mips64Assembler::CmpUeqS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUeqS()
881 void Mips64Assembler::CmpLtS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpLtS()
885 void Mips64Assembler::CmpUltS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUltS()
889 void Mips64Assembler::CmpLeS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpLeS()
893 void Mips64Assembler::CmpUleS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUleS()
897 void Mips64Assembler::CmpOrS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpOrS()
901 void Mips64Assembler::CmpUneS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUneS()
905 void Mips64Assembler::CmpNeS(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpNeS()
909 void Mips64Assembler::CmpUnD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUnD()
913 void Mips64Assembler::CmpEqD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpEqD()
917 void Mips64Assembler::CmpUeqD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUeqD()
921 void Mips64Assembler::CmpLtD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpLtD()
925 void Mips64Assembler::CmpUltD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUltD()
929 void Mips64Assembler::CmpLeD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpLeD()
933 void Mips64Assembler::CmpUleD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUleD()
937 void Mips64Assembler::CmpOrD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpOrD()
941 void Mips64Assembler::CmpUneD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpUneD()
945 void Mips64Assembler::CmpNeD(FpuRegister fd, FpuRegister fs, FpuRegister ft) {  in CmpNeD()
949 void Mips64Assembler::Cvtsw(FpuRegister fd, FpuRegister fs) {  in Cvtsw()
950   EmitFR(0x11, 0x14, static_cast<FpuRegister>(0), fs, fd, 0x20);  in Cvtsw()
953 void Mips64Assembler::Cvtdw(FpuRegister fd, FpuRegister fs) {  in Cvtdw()
954   EmitFR(0x11, 0x14, static_cast<FpuRegister>(0), fs, fd, 0x21);  in Cvtdw()
957 void Mips64Assembler::Cvtsd(FpuRegister fd, FpuRegister fs) {  in Cvtsd()
958   EmitFR(0x11, 0x11, static_cast<FpuRegister>(0), fs, fd, 0x20);  in Cvtsd()
961 void Mips64Assembler::Cvtds(FpuRegister fd, FpuRegister fs) {  in Cvtds()
962   EmitFR(0x11, 0x10, static_cast<FpuRegister>(0), fs, fd, 0x21);  in Cvtds()
965 void Mips64Assembler::Cvtsl(FpuRegister fd, FpuRegister fs) {  in Cvtsl()
966   EmitFR(0x11, 0x15, static_cast<FpuRegister>(0), fs, fd, 0x20);  in Cvtsl()
969 void Mips64Assembler::Cvtdl(FpuRegister fd, FpuRegister fs) {  in Cvtdl()
970   EmitFR(0x11, 0x15, static_cast<FpuRegister>(0), fs, fd, 0x21);  in Cvtdl()
973 void Mips64Assembler::Mfc1(GpuRegister rt, FpuRegister fs) {  in Mfc1()
974   EmitFR(0x11, 0x00, static_cast<FpuRegister>(rt), fs, static_cast<FpuRegister>(0), 0x0);  in Mfc1()
977 void Mips64Assembler::Mfhc1(GpuRegister rt, FpuRegister fs) {  in Mfhc1()
978   EmitFR(0x11, 0x03, static_cast<FpuRegister>(rt), fs, static_cast<FpuRegister>(0), 0x0);  in Mfhc1()
981 void Mips64Assembler::Mtc1(GpuRegister rt, FpuRegister fs) {  in Mtc1()
982   EmitFR(0x11, 0x04, static_cast<FpuRegister>(rt), fs, static_cast<FpuRegister>(0), 0x0);  in Mtc1()
985 void Mips64Assembler::Mthc1(GpuRegister rt, FpuRegister fs) {  in Mthc1()
986   EmitFR(0x11, 0x07, static_cast<FpuRegister>(rt), fs, static_cast<FpuRegister>(0), 0x0);  in Mthc1()
989 void Mips64Assembler::Dmfc1(GpuRegister rt, FpuRegister fs) {  in Dmfc1()
990   EmitFR(0x11, 0x01, static_cast<FpuRegister>(rt), fs, static_cast<FpuRegister>(0), 0x0);  in Dmfc1()
993 void Mips64Assembler::Dmtc1(GpuRegister rt, FpuRegister fs) {  in Dmtc1()
994   EmitFR(0x11, 0x05, static_cast<FpuRegister>(rt), fs, static_cast<FpuRegister>(0), 0x0);  in Dmtc1()
997 void Mips64Assembler::Lwc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) {  in Lwc1()
1001 void Mips64Assembler::Ldc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) {  in Ldc1()
1005 void Mips64Assembler::Swc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) {  in Swc1()
1009 void Mips64Assembler::Sdc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) {  in Sdc1()
1795 void Mips64Assembler::Bc1eqz(FpuRegister ft, Mips64Label* label) {  in Bc1eqz()
1799 void Mips64Assembler::Bc1nez(FpuRegister ft, Mips64Label* label) {  in Bc1nez()
1848 void Mips64Assembler::LoadFpuFromOffset(LoadOperandType type, FpuRegister reg, GpuRegister base,  in LoadFpuFromOffset()
1943 void Mips64Assembler::StoreFpuToOffset(StoreOperandType type, FpuRegister reg, GpuRegister base,  in StoreFpuToOffset()