27 inline bool Instruction::HasVRegA() const {  in HasVRegA()
57 inline int32_t Instruction::VRegA() const {  in VRegA()
89 inline int8_t Instruction::VRegA_10t(uint16_t inst_data) const {  in VRegA_10t()
94 inline uint8_t Instruction::VRegA_10x(uint16_t inst_data) const {  in VRegA_10x()
99 inline uint4_t Instruction::VRegA_11n(uint16_t inst_data) const {  in VRegA_11n()
104 inline uint8_t Instruction::VRegA_11x(uint16_t inst_data) const {  in VRegA_11x()
109 inline uint4_t Instruction::VRegA_12x(uint16_t inst_data) const {  in VRegA_12x()
114 inline int16_t Instruction::VRegA_20t() const {  in VRegA_20t()
119 inline uint8_t Instruction::VRegA_21c(uint16_t inst_data) const {  in VRegA_21c()
124 inline uint8_t Instruction::VRegA_21h(uint16_t inst_data) const {  in VRegA_21h()
129 inline uint8_t Instruction::VRegA_21s(uint16_t inst_data) const {  in VRegA_21s()
134 inline uint8_t Instruction::VRegA_21t(uint16_t inst_data) const {  in VRegA_21t()
139 inline uint8_t Instruction::VRegA_22b(uint16_t inst_data) const {  in VRegA_22b()
144 inline uint4_t Instruction::VRegA_22c(uint16_t inst_data) const {  in VRegA_22c()
149 inline uint4_t Instruction::VRegA_22s(uint16_t inst_data) const {  in VRegA_22s()
154 inline uint4_t Instruction::VRegA_22t(uint16_t inst_data) const {  in VRegA_22t()
159 inline uint8_t Instruction::VRegA_22x(uint16_t inst_data) const {  in VRegA_22x()
164 inline uint8_t Instruction::VRegA_23x(uint16_t inst_data) const {  in VRegA_23x()
169 inline int32_t Instruction::VRegA_30t() const {  in VRegA_30t()
174 inline uint8_t Instruction::VRegA_31c(uint16_t inst_data) const {  in VRegA_31c()
179 inline uint8_t Instruction::VRegA_31i(uint16_t inst_data) const {  in VRegA_31i()
184 inline uint8_t Instruction::VRegA_31t(uint16_t inst_data) const {  in VRegA_31t()
189 inline uint16_t Instruction::VRegA_32x() const {  in VRegA_32x()
194 inline uint4_t Instruction::VRegA_35c(uint16_t inst_data) const {  in VRegA_35c()
199 inline uint8_t Instruction::VRegA_3rc(uint16_t inst_data) const {  in VRegA_3rc()
204 inline uint8_t Instruction::VRegA_51l(uint16_t inst_data) const {  in VRegA_51l()
212 inline bool Instruction::HasVRegB() const {  in HasVRegB()
238 inline bool Instruction::HasWideVRegB() const {  in HasWideVRegB()
242 inline int32_t Instruction::VRegB() const {  in VRegB()
270 inline uint64_t Instruction::WideVRegB() const {  in WideVRegB()
274 inline int4_t Instruction::VRegB_11n(uint16_t inst_data) const {  in VRegB_11n()
279 inline uint4_t Instruction::VRegB_12x(uint16_t inst_data) const {  in VRegB_12x()
284 inline uint16_t Instruction::VRegB_21c() const {  in VRegB_21c()
289 inline uint16_t Instruction::VRegB_21h() const {  in VRegB_21h()
294 inline int16_t Instruction::VRegB_21s() const {  in VRegB_21s()
299 inline int16_t Instruction::VRegB_21t() const {  in VRegB_21t()
304 inline uint8_t Instruction::VRegB_22b() const {  in VRegB_22b()
309 inline uint4_t Instruction::VRegB_22c(uint16_t inst_data) const {  in VRegB_22c()
314 inline uint4_t Instruction::VRegB_22s(uint16_t inst_data) const {  in VRegB_22s()
319 inline uint4_t Instruction::VRegB_22t(uint16_t inst_data) const {  in VRegB_22t()
324 inline uint16_t Instruction::VRegB_22x() const {  in VRegB_22x()
329 inline uint8_t Instruction::VRegB_23x() const {  in VRegB_23x()
335 inline uint4_t Instruction::VRegB_25x() const {  in VRegB_25x()
340 inline uint32_t Instruction::VRegB_31c() const {  in VRegB_31c()
345 inline int32_t Instruction::VRegB_31i() const {  in VRegB_31i()
350 inline int32_t Instruction::VRegB_31t() const {  in VRegB_31t()
355 inline uint16_t Instruction::VRegB_32x() const {  in VRegB_32x()
360 inline uint16_t Instruction::VRegB_35c() const {  in VRegB_35c()
365 inline uint16_t Instruction::VRegB_3rc() const {  in VRegB_3rc()
370 inline uint64_t Instruction::VRegB_51l() const {  in VRegB_51l()
379 inline bool Instruction::HasVRegC() const {  in HasVRegC()
393 inline int32_t Instruction::VRegC() const {  in VRegC()
409 inline int8_t Instruction::VRegC_22b() const {  in VRegC_22b()
414 inline uint16_t Instruction::VRegC_22c() const {  in VRegC_22c()
419 inline int16_t Instruction::VRegC_22s() const {  in VRegC_22s()
424 inline int16_t Instruction::VRegC_22t() const {  in VRegC_22t()
429 inline uint8_t Instruction::VRegC_23x() const {  in VRegC_23x()
434 inline uint4_t Instruction::VRegC_25x() const {  in VRegC_25x()
439 inline uint4_t Instruction::VRegC_35c() const {  in VRegC_35c()
444 inline uint16_t Instruction::VRegC_3rc() const {  in VRegC_3rc()
449 inline bool Instruction::HasVarArgs35c() const {  in HasVarArgs35c()
453 inline bool Instruction::HasVarArgs25x() const {  in HasVarArgs25x()
458 inline void Instruction::GetAllArgs25x(uint32_t (&arg)[kMaxVarArgRegs25x]) const {  in GetAllArgs25x()
522 inline void Instruction::GetVarArgs(uint32_t arg[kMaxVarArgRegs], uint16_t inst_data) const {  in GetVarArgs()