Lines Matching refs:t8
103 #define t8 $$24 /* two more temp registers */ macro
280 addu t8, rFP, AT; \
281 sw rd, 0(t8); \
282 addu t8, rREFS, AT; \
284 sw zero, 0(t8)
288 addu t8, rFP, AT; \
289 sw rlo, 0(t8); \
290 sw rhi, 4(t8); \
291 addu t8, rREFS, AT; \
293 sw zero, 0(t8); \
294 sw zero, 4(t8)
299 addu t8, rREFS, AT; \
300 sw zero, 0(t8); \
301 sw zero, 4(t8); \
302 addu t8, rFP, AT; \
304 sw AT, 4(t8); \
306 s.s rlo, 0(t8)
310 addu t8, rFP, AT; \
311 s.s rlo, 0(t8); \
312 s.s rhi, 4(t8); \
313 addu t8, rREFS, AT; \
315 sw zero, 0(t8); \
316 sw zero, 4(t8)
321 addu t8, rFP, AT; \
322 sw rd, 0(t8); \
323 addu t8, rREFS, AT; \
325 sw rd, 0(t8)
333 addu t8, rFP, AT; \
334 sw rd, 0(t8); \
335 addu t8, rREFS, AT; \
338 sw zero, 0(t8); \
347 addu t8, rFP, AT; \
348 sw rlo, 0(t8); \
349 sw rhi, 4(t8); \
350 addu t8, rREFS, AT; \
352 sw zero, 0(t8); \
354 sw zero, 4(t8); \
359 addu t8, rFP, AT; \
360 s.s rd, 0(t8); \
361 addu t8, rREFS, AT; \
363 sw zero, 0(t8)