38   return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,  in _mm_cmpeq_epi32_mask()
44   return (__mmask8)__builtin_ia32_pcmpeqd128_mask((__v4si)__a, (__v4si)__b,  in _mm_mask_cmpeq_epi32_mask()
50   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,  in _mm_cmpeq_epu32_mask()
56   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 0,  in _mm_mask_cmpeq_epu32_mask()
135   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,  in _mm_cmpge_epi32_mask()
141   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 5,  in _mm_mask_cmpge_epi32_mask()
147   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,  in _mm_cmpge_epu32_mask()
153   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 5,  in _mm_mask_cmpge_epu32_mask()
231   return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,  in _mm_cmpgt_epi32_mask()
237   return (__mmask8)__builtin_ia32_pcmpgtd128_mask((__v4si)__a, (__v4si)__b,  in _mm_mask_cmpgt_epi32_mask()
243   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,  in _mm_cmpgt_epu32_mask()
249   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 6,  in _mm_mask_cmpgt_epu32_mask()
327   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,  in _mm_cmple_epi32_mask()
333   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 2,  in _mm_mask_cmple_epi32_mask()
339   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,  in _mm_cmple_epu32_mask()
345   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 2,  in _mm_mask_cmple_epu32_mask()
423   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,  in _mm_cmplt_epi32_mask()
429   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 1,  in _mm_mask_cmplt_epi32_mask()
435   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,  in _mm_cmplt_epu32_mask()
441   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 1,  in _mm_mask_cmplt_epu32_mask()
519   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,  in _mm_cmpneq_epi32_mask()
525   return (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)__a, (__v4si)__b, 4,  in _mm_mask_cmpneq_epi32_mask()
531   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,  in _mm_cmpneq_epu32_mask()
537   return (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)__a, (__v4si)__b, 4,  in _mm_mask_cmpneq_epu32_mask()
697   return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,  in _mm_mask_add_epi32()
698              (__v4si) __B,  in _mm_mask_add_epi32()
699              (__v4si) __W,  in _mm_mask_add_epi32()
706   return (__m128i) __builtin_ia32_paddd128_mask ((__v4si) __A,  in _mm_maskz_add_epi32()
707              (__v4si) __B,  in _mm_maskz_add_epi32()
708              (__v4si)  in _mm_maskz_add_epi32()
737   return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,  in _mm_mask_sub_epi32()
738              (__v4si) __B,  in _mm_mask_sub_epi32()
739              (__v4si) __W,  in _mm_mask_sub_epi32()
746   return (__m128i) __builtin_ia32_psubd128_mask ((__v4si) __A,  in _mm_maskz_sub_epi32()
747              (__v4si) __B,  in _mm_maskz_sub_epi32()
748              (__v4si)  in _mm_maskz_sub_epi32()
796   return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,  in _mm_mask_mul_epi32()
797               (__v4si) __Y,  in _mm_mask_mul_epi32()
804   return (__m128i) __builtin_ia32_pmuldq128_mask ((__v4si) __X,  in _mm_maskz_mul_epi32()
805               (__v4si) __Y,  in _mm_maskz_mul_epi32()
834   return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,  in _mm_mask_mul_epu32()
835                (__v4si) __Y,  in _mm_mask_mul_epu32()
842   return (__m128i) __builtin_ia32_pmuludq128_mask ((__v4si) __X,  in _mm_maskz_mul_epu32()
843                (__v4si) __Y,  in _mm_maskz_mul_epu32()
871   return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,  in _mm_maskz_mullo_epi32()
872               (__v4si) __B,  in _mm_maskz_mullo_epi32()
873               (__v4si)  in _mm_maskz_mullo_epi32()
882   return (__m128i) __builtin_ia32_pmulld128_mask ((__v4si) __A,  in _mm_mask_mullo_epi32()
883               (__v4si) __B,  in _mm_mask_mullo_epi32()
884               (__v4si) __W, __M);  in _mm_mask_mullo_epi32()
910   return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,  in _mm_mask_and_epi32()
911              (__v4si) __B,  in _mm_mask_and_epi32()
912              (__v4si) __W,  in _mm_mask_and_epi32()
919   return (__m128i) __builtin_ia32_pandd128_mask ((__v4si) __A,  in _mm_maskz_and_epi32()
920              (__v4si) __B,  in _mm_maskz_and_epi32()
921              (__v4si)  in _mm_maskz_and_epi32()
950   return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,  in _mm_mask_andnot_epi32()
951               (__v4si) __B,  in _mm_mask_andnot_epi32()
952               (__v4si) __W,  in _mm_mask_andnot_epi32()
959   return (__m128i) __builtin_ia32_pandnd128_mask ((__v4si) __A,  in _mm_maskz_andnot_epi32()
960               (__v4si) __B,  in _mm_maskz_andnot_epi32()
961               (__v4si)  in _mm_maskz_andnot_epi32()
989   return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,  in _mm_mask_or_epi32()
990             (__v4si) __B,  in _mm_mask_or_epi32()
991             (__v4si) __W,  in _mm_mask_or_epi32()
998   return (__m128i) __builtin_ia32_pord128_mask ((__v4si) __A,  in _mm_maskz_or_epi32()
999             (__v4si) __B,  in _mm_maskz_or_epi32()
1000             (__v4si)  in _mm_maskz_or_epi32()
1029   return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,  in _mm_mask_xor_epi32()
1030              (__v4si) __B,  in _mm_mask_xor_epi32()
1031              (__v4si) __W,  in _mm_mask_xor_epi32()
1038   return (__m128i) __builtin_ia32_pxord128_mask ((__v4si) __A,  in _mm_maskz_xor_epi32()
1039              (__v4si) __B,  in _mm_maskz_xor_epi32()
1040              (__v4si)  in _mm_maskz_xor_epi32()
1201   (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
1202                                         (__v4si)(__m128i)(b), \
1206   (__mmask8)__builtin_ia32_cmpd128_mask((__v4si)(__m128i)(a), \
1207                                         (__v4si)(__m128i)(b), \
1211   (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
1212                                          (__v4si)(__m128i)(b), \
1216   (__mmask8)__builtin_ia32_ucmpd128_mask((__v4si)(__m128i)(a), \
1217                                          (__v4si)(__m128i)(b), \
2047   return (__m128i) __builtin_ia32_blendmd_128_mask ((__v4si) __A,  in _mm_mask_blend_epi32()
2048                 (__v4si) __W,  in _mm_mask_blend_epi32()
2193   return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,  in _mm_mask_compress_epi32()
2194                   (__v4si) __W,  in _mm_mask_compress_epi32()
2200   return (__m128i) __builtin_ia32_compresssi128_mask ((__v4si) __A,  in _mm_maskz_compress_epi32()
2201                   (__v4si)  in _mm_maskz_compress_epi32()
2265   __builtin_ia32_compressstoresi128_mask ((__v4si *) __P,  in _mm_mask_compressstoreu_epi32()
2266             (__v4si) __A,  in _mm_mask_compressstoreu_epi32()
2279   return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A,  in _mm_mask_cvtepi32_pd()
2286   return (__m128d) __builtin_ia32_cvtdq2pd128_mask ((__v4si) __A,  in _mm_maskz_cvtepi32_pd()
2294   return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A,  in _mm256_mask_cvtepi32_pd()
2301   return (__m256d) __builtin_ia32_cvtdq2pd256_mask ((__v4si) __A,  in _mm256_maskz_cvtepi32_pd()
2309   return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A,  in _mm_mask_cvtepi32_ps()
2316   return (__m128) __builtin_ia32_cvtdq2ps128_mask ((__v4si) __A,  in _mm_maskz_cvtepi32_ps()
2340                 (__v4si) __W,  in _mm_mask_cvtpd_epi32()
2347                 (__v4si)  in _mm_maskz_cvtpd_epi32()
2355                 (__v4si) __W,  in _mm256_mask_cvtpd_epi32()
2362                 (__v4si)  in _mm256_maskz_cvtpd_epi32()
2400                  (__v4si)  in _mm_cvtpd_epu32()
2408                  (__v4si) __W,  in _mm_mask_cvtpd_epu32()
2415                  (__v4si)  in _mm_maskz_cvtpd_epu32()
2423                  (__v4si)  in _mm256_cvtpd_epu32()
2431                  (__v4si) __W,  in _mm256_mask_cvtpd_epu32()
2438                  (__v4si)  in _mm256_maskz_cvtpd_epu32()
2446                 (__v4si) __W,  in _mm_mask_cvtps_epi32()
2453                 (__v4si)  in _mm_maskz_cvtps_epi32()
2506                  (__v4si)  in _mm_cvtps_epu32()
2514                  (__v4si) __W,  in _mm_mask_cvtps_epu32()
2521                  (__v4si)  in _mm_maskz_cvtps_epu32()
2552                  (__v4si) __W,  in _mm_mask_cvttpd_epi32()
2559                  (__v4si)  in _mm_maskz_cvttpd_epi32()
2567                  (__v4si) __W,  in _mm256_mask_cvttpd_epi32()
2574                  (__v4si)  in _mm256_maskz_cvttpd_epi32()
2582                   (__v4si)  in _mm_cvttpd_epu32()
2590                   (__v4si) __W,  in _mm_mask_cvttpd_epu32()
2597                   (__v4si)  in _mm_maskz_cvttpd_epu32()
2605                   (__v4si)  in _mm256_cvttpd_epu32()
2613                   (__v4si) __W,  in _mm256_mask_cvttpd_epu32()
2620                   (__v4si)  in _mm256_maskz_cvttpd_epu32()
2628                  (__v4si) __W,  in _mm_mask_cvttps_epi32()
2635                  (__v4si)  in _mm_maskz_cvttps_epi32()
2658                   (__v4si)  in _mm_cvttps_epu32()
2666                   (__v4si) __W,  in _mm_mask_cvttps_epu32()
2673                   (__v4si)  in _mm_maskz_cvttps_epu32()
2703   return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,  in _mm_cvtepu32_pd()
2711   return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,  in _mm_mask_cvtepu32_pd()
2718   return (__m128d) __builtin_ia32_cvtudq2pd128_mask ((__v4si) __A,  in _mm_maskz_cvtepu32_pd()
2726   return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,  in _mm256_cvtepu32_pd()
2734   return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,  in _mm256_mask_cvtepu32_pd()
2741   return (__m256d) __builtin_ia32_cvtudq2pd256_mask ((__v4si) __A,  in _mm256_maskz_cvtepu32_pd()
2749   return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,  in _mm_cvtepu32_ps()
2757   return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,  in _mm_mask_cvtepu32_ps()
2764   return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,  in _mm_maskz_cvtepu32_ps()
3025   return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P,  in _mm_mask_expandloadu_epi32()
3026               (__v4si) __W,  in _mm_mask_expandloadu_epi32()
3033   return (__m128i) __builtin_ia32_expandloadsi128_mask ((__v4si *) __P,  in _mm_maskz_expandloadu_epi32()
3034                (__v4si)  in _mm_maskz_expandloadu_epi32()
3089   return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,  in _mm_mask_expand_epi32()
3090                 (__v4si) __W,  in _mm_mask_expand_epi32()
3096   return (__m128i) __builtin_ia32_expandsi128_mask ((__v4si) __A,  in _mm_maskz_expand_epi32()
3097                  (__v4si)  in _mm_maskz_expand_epi32()
3418   return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A,  in _mm_mask_abs_epi32()
3419              (__v4si) __W,  in _mm_mask_abs_epi32()
3425   return (__m128i) __builtin_ia32_pabsd128_mask ((__v4si) __A,  in _mm_maskz_abs_epi32()
3426              (__v4si)  in _mm_maskz_abs_epi32()
3494   return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A,  in _mm_maskz_max_epi32()
3495               (__v4si) __B,  in _mm_maskz_max_epi32()
3496               (__v4si)  in _mm_maskz_max_epi32()
3504   return (__m128i) __builtin_ia32_pmaxsd128_mask ((__v4si) __A,  in _mm_mask_max_epi32()
3505               (__v4si) __B,  in _mm_mask_max_epi32()
3506               (__v4si) __W, __M);  in _mm_mask_max_epi32()
3580   return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A,  in _mm_maskz_max_epu32()
3581               (__v4si) __B,  in _mm_maskz_max_epu32()
3582               (__v4si)  in _mm_maskz_max_epu32()
3590   return (__m128i) __builtin_ia32_pmaxud128_mask ((__v4si) __A,  in _mm_mask_max_epu32()
3591               (__v4si) __B,  in _mm_mask_max_epu32()
3592               (__v4si) __W, __M);  in _mm_mask_max_epu32()
3666   return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A,  in _mm_maskz_min_epi32()
3667               (__v4si) __B,  in _mm_maskz_min_epi32()
3668               (__v4si)  in _mm_maskz_min_epi32()
3676   return (__m128i) __builtin_ia32_pminsd128_mask ((__v4si) __A,  in _mm_mask_min_epi32()
3677               (__v4si) __B,  in _mm_mask_min_epi32()
3678               (__v4si) __W, __M);  in _mm_mask_min_epi32()
3752   return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A,  in _mm_maskz_min_epu32()
3753               (__v4si) __B,  in _mm_maskz_min_epu32()
3754               (__v4si)  in _mm_maskz_min_epu32()
3762   return (__m128i) __builtin_ia32_pminud128_mask ((__v4si) __A,  in _mm_mask_min_epu32()
3763               (__v4si) __B,  in _mm_mask_min_epu32()
3764               (__v4si) __W, __M);  in _mm_mask_min_epu32()
4048         (__v2di) __index, (__v4si) __v1, __scale); })
4053         (__v4si) __v1, __scale); })
4066         (__v4di) __index, (__v4si) __v1, __scale); })
4071         (__v4si) __v1, __scale); })
4076         (__v4si) __index, (__v2df) __v1, __scale); })
4080   __builtin_ia32_scattersiv2df (__addr, __mask, (__v4si) __index,\
4085         (__v4si) __index, (__v2di) __v1, __scale); })
4089   __builtin_ia32_scattersiv2di (__addr, __mask, (__v4si) __index, \
4094         (__v4si) __index, (__v4df) __v1, __scale); })
4098   __builtin_ia32_scattersiv4df (__addr, __mask, (__v4si) __index, \
4104         (__v4si) __index, (__v4di) __v1, __scale); })
4108   __builtin_ia32_scattersiv4di (__addr, __mask, (__v4si) __index,   \
4113         (__v4si) __index, (__v4sf) __v1, __scale); })
4117   __builtin_ia32_scattersiv4sf (__addr, __mask, (__v4si) __index, \
4122         (__v4si) __index, (__v4si) __v1, __scale); })
4126   __builtin_ia32_scattersiv4si (__addr, __mask, (__v4si) __index,\
4127         (__v4si) __v1, __scale); })
4279   return (__m128i) __builtin_ia32_vpermi2vard128_mask ((__v4si) __A,  in _mm_mask2_permutex2var_epi32()
4280                    (__v4si) __I  in _mm_mask2_permutex2var_epi32()
4282                    (__v4si) __B,  in _mm_mask2_permutex2var_epi32()
4322                    (__v4si) __I  in _mm_mask2_permutex2var_ps()
4360   return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I  in _mm_permutex2var_epi32()
4362                    (__v4si) __A,  in _mm_permutex2var_epi32()
4363                    (__v4si) __B,  in _mm_permutex2var_epi32()
4370   return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I  in _mm_mask_permutex2var_epi32()
4372                    (__v4si) __A,  in _mm_mask_permutex2var_epi32()
4373                    (__v4si) __B,  in _mm_mask_permutex2var_epi32()
4380   return (__m128i) __builtin_ia32_vpermt2vard128_maskz ((__v4si) __I  in _mm_maskz_permutex2var_epi32()
4382               (__v4si) __A,  in _mm_maskz_permutex2var_epi32()
4383               (__v4si) __B,  in _mm_maskz_permutex2var_epi32()
4484   return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I  in _mm_permutex2var_ps()
4494   return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I  in _mm_mask_permutex2var_ps()
4504   return (__m128) __builtin_ia32_vpermt2varps128_maskz ((__v4si) __I  in _mm_maskz_permutex2var_ps()