81 static int radeon_get_pitch_align(struct radeon_info *info, int bpe, uint32_t tiling)  in radeon_get_pitch_align()  argument
85 	if (info->chip_family >= CHIP_FAMILY_R600) {  in radeon_get_pitch_align()
88 			pitch_align = (((info->group_bytes / 8) / bpe) *  in radeon_get_pitch_align()
89 					info->num_banks) * 8;  in radeon_get_pitch_align()
91 			pitch_align = MAX(info->num_banks * 8, pitch_align);  in radeon_get_pitch_align()
94 			pitch_align = MAX(8, (info->group_bytes / (8 * bpe)));  in radeon_get_pitch_align()
96 			pitch_align = MAX(info->group_bytes / bpe, pitch_align);  in radeon_get_pitch_align()
98 			if (info->have_tiling_info)  in radeon_get_pitch_align()
100 				pitch_align = MAX(64, info->group_bytes / bpe);  in radeon_get_pitch_align()
122 static int radeon_get_height_align(struct radeon_info *info, uint32_t tiling)  in radeon_get_height_align()  argument
126 	if (info->chip_family >= CHIP_FAMILY_R600) {  in radeon_get_height_align()
128 			height_align =  info->num_channels * 8;  in radeon_get_height_align()
145 static int radeon_get_base_align(struct radeon_info *info,  in radeon_get_base_align()  argument
148         int pixel_align = radeon_get_pitch_align(info, bpe, tiling);  in radeon_get_base_align()
149         int height_align = radeon_get_height_align(info, tiling);  in radeon_get_base_align()
152         if (info->chip_family >= CHIP_FAMILY_R600) {  in radeon_get_base_align()
154                         base_align = MAX(info->num_banks * info->num_channels * 8 * 8 * bpe,  in radeon_get_base_align()
157                         if (info->have_tiling_info)  in radeon_get_base_align()
158                                 base_align = info->group_bytes;  in radeon_get_base_align()
171 static uint32_t radeon_get_tiling(struct radeon_info *info,  in radeon_get_tiling()  argument
176 	if ((handle->usage & sw) && !info->allow_color_tiling)  in radeon_get_tiling()
179 	if (info->chip_family >= CHIP_FAMILY_R600)  in radeon_get_tiling()
185 static struct radeon_bo *radeon_alloc(struct radeon_info *info,  in radeon_alloc()  argument
200 	tiling = radeon_get_tiling(info, handle);  in radeon_alloc()
210 				radeon_get_pitch_align(info, cpp, tiling));  in radeon_alloc()
212 				radeon_get_height_align(info, tiling));  in radeon_alloc()
222 	base_align = radeon_get_base_align(info, cpp, tiling);  in radeon_alloc()
224 	rbo = radeon_bo_open(info->bufmgr, 0, size, base_align, domain, 0);  in radeon_alloc()
246 static void radeon_zero(struct radeon_info *info,  in radeon_zero()  argument
259 	struct radeon_info *info = (struct radeon_info *) drv;  in drm_gem_radeon_alloc()  local
267 		rbuf->rbo = radeon_bo_open(info->bufmgr,  in drm_gem_radeon_alloc()
277 		rbuf->rbo = radeon_alloc(info, handle);  in drm_gem_radeon_alloc()
284 		radeon_zero(info, rbuf->rbo);  in drm_gem_radeon_alloc()
325 	struct radeon_info *info = (struct radeon_info *) drv;  in drm_gem_radeon_destroy()  local
327 	radeon_bo_manager_gem_dtor(info->bufmgr);  in drm_gem_radeon_destroy()
328 	free(info);  in drm_gem_radeon_destroy()
331 static int radeon_init_tile_config(struct radeon_info *info)  in radeon_init_tile_config()  argument
340 	ret = drmCommandWriteRead(info->fd, DRM_RADEON_INFO,  in radeon_init_tile_config()
345 	info->tile_config = val;  in radeon_init_tile_config()
347 	if (info->chip_family >= CHIP_FAMILY_CEDAR) {  in radeon_init_tile_config()
348 		switch (info->tile_config & 0xf) {  in radeon_init_tile_config()
350 			info->num_channels = 1;  in radeon_init_tile_config()
353 			info->num_channels = 2;  in radeon_init_tile_config()
356 			info->num_channels = 4;  in radeon_init_tile_config()
359 			info->num_channels = 8;  in radeon_init_tile_config()
366 		switch ((info->tile_config & 0xf0) >> 4) {  in radeon_init_tile_config()
368 			info->num_banks = 4;  in radeon_init_tile_config()
371 			info->num_banks = 8;  in radeon_init_tile_config()
374 			info->num_banks = 16;  in radeon_init_tile_config()
381 		switch ((info->tile_config & 0xf00) >> 8) {  in radeon_init_tile_config()
383 			info->group_bytes = 256;  in radeon_init_tile_config()
386 			info->group_bytes = 512;  in radeon_init_tile_config()
394 		switch ((info->tile_config & 0xe) >> 1) {  in radeon_init_tile_config()
396 			info->num_channels = 1;  in radeon_init_tile_config()
399 			info->num_channels = 2;  in radeon_init_tile_config()
402 			info->num_channels = 4;  in radeon_init_tile_config()
405 			info->num_channels = 8;  in radeon_init_tile_config()
412 		switch ((info->tile_config & 0x30) >> 4) {  in radeon_init_tile_config()
414 			info->num_banks = 4;  in radeon_init_tile_config()
417 			info->num_banks = 8;  in radeon_init_tile_config()
424 		switch ((info->tile_config & 0xc0) >> 6) {  in radeon_init_tile_config()
426 			info->group_bytes = 256;  in radeon_init_tile_config()
429 			info->group_bytes = 512;  in radeon_init_tile_config()
437 	info->have_tiling_info = 1;  in radeon_init_tile_config()
442 static int radeon_probe(struct radeon_info *info)  in radeon_probe()  argument
451 	kinfo.value = (long) &info->chipset;  in radeon_probe()
452 	err = drmCommandWriteRead(info->fd, DRM_RADEON_INFO, &kinfo, sizeof(kinfo));  in radeon_probe()
461 		if (info->chipset == card->pci_device_id) {  in radeon_probe()
462 			info->chip_family = card->chip_family;  in radeon_probe()
463 			info->is_mobility = card->mobility;  in radeon_probe()
464 			info->is_igp = card->igp;  in radeon_probe()
469 	if (info->chip_family == CHIP_FAMILY_UNKNOW) {  in radeon_probe()
470 		ALOGE("unknown device id 0x%04x", info->chipset);  in radeon_probe()
474 	if (info->chip_family >= CHIP_FAMILY_R600) {  in radeon_probe()
475 		err = radeon_init_tile_config(info);  in radeon_probe()
482 		info->have_tiling_info = 0;  in radeon_probe()
486 	info->allow_color_tiling = 0;  in radeon_probe()
489 	err = drmCommandWriteRead(info->fd, DRM_RADEON_GEM_INFO, &mminfo, sizeof(mminfo));  in radeon_probe()
491 		ALOGE("failed to get gem info");  in radeon_probe()
495 	info->vram_size = mminfo.vram_visible;  in radeon_probe()
496 	info->gart_size = mminfo.gart_size;  in radeon_probe()
499 			info->chipset, info->chip_family,  in radeon_probe()
500 			info->vram_size / 1024 / 1024,  in radeon_probe()
501 			info->gart_size / 1024 / 1024);  in radeon_probe()
508 	struct radeon_info *info;  in gralloc_drm_drv_create_for_radeon()  local
510 	info = calloc(1, sizeof(*info));  in gralloc_drm_drv_create_for_radeon()
511 	if (!info)  in gralloc_drm_drv_create_for_radeon()
514 	info->fd = fd;  in gralloc_drm_drv_create_for_radeon()
515 	if (radeon_probe(info)) {  in gralloc_drm_drv_create_for_radeon()
516 		free(info);  in gralloc_drm_drv_create_for_radeon()
520 	info->bufmgr = radeon_bo_manager_gem_ctor(info->fd);  in gralloc_drm_drv_create_for_radeon()
521 	if (!info->bufmgr) {  in gralloc_drm_drv_create_for_radeon()
523 		free(info);  in gralloc_drm_drv_create_for_radeon()
527 	info->base.destroy = drm_gem_radeon_destroy;  in gralloc_drm_drv_create_for_radeon()
528 	info->base.alloc = drm_gem_radeon_alloc;  in gralloc_drm_drv_create_for_radeon()
529 	info->base.free = drm_gem_radeon_free;  in gralloc_drm_drv_create_for_radeon()
530 	info->base.map = drm_gem_radeon_map;  in gralloc_drm_drv_create_for_radeon()
531 	info->base.unmap = drm_gem_radeon_unmap;  in gralloc_drm_drv_create_for_radeon()
533 	return &info->base;  in gralloc_drm_drv_create_for_radeon()