Lines Matching refs:bo
131 void drm_intel_bo_reference(drm_intel_bo *bo);
132 void drm_intel_bo_unreference(drm_intel_bo *bo);
133 int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
134 int drm_intel_bo_unmap(drm_intel_bo *bo);
136 int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
138 int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
140 void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
144 int drm_intel_bo_exec(drm_intel_bo *bo, int used,
146 int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
151 int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
154 int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
158 int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
159 int drm_intel_bo_unpin(drm_intel_bo *bo);
160 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
162 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
164 int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name);
165 int drm_intel_bo_busy(drm_intel_bo *bo);
166 int drm_intel_bo_madvise(drm_intel_bo *bo, int madv);
167 int drm_intel_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable);
168 int drm_intel_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset);
170 int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
171 int drm_intel_bo_is_reusable(drm_intel_bo *bo);
172 int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
183 int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo);
184 int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
185 int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
187 int drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo);
188 void drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start);
189 void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
195 void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo,
200 drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo,
208 int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns);
212 int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
215 int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd);
230 int (*exec) (drm_intel_bo *bo,
243 void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
245 * bo,
301 #define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0) argument