163                         struct radeon_surface_level *surflevel,  in surf_minify()  argument
168     surflevel->npix_x = mip_minify(surf->npix_x, level);  in surf_minify()
169     surflevel->npix_y = mip_minify(surf->npix_y, level);  in surf_minify()
170     surflevel->npix_z = mip_minify(surf->npix_z, level);  in surf_minify()
171     surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w;  in surf_minify()
172     surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h;  in surf_minify()
173     surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d;  in surf_minify()
174     if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D &&  in surf_minify()
176         if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) {  in surf_minify()
177             surflevel->mode = RADEON_SURF_MODE_1D;  in surf_minify()
181     surflevel->nblk_x  = ALIGN(surflevel->nblk_x, xalign);  in surf_minify()
182     surflevel->nblk_y  = ALIGN(surflevel->nblk_y, yalign);  in surf_minify()
183     surflevel->nblk_z  = ALIGN(surflevel->nblk_z, zalign);  in surf_minify()
185     surflevel->offset = offset;  in surf_minify()
186     surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;  in surf_minify()
187     surflevel->slice_size = (uint64_t)surflevel->pitch_bytes * surflevel->nblk_y;  in surf_minify()
189     surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;  in surf_minify()
566                            struct radeon_surface_level *surflevel,  in eg_surf_minify()  argument
577     surflevel->npix_x = mip_minify(surf->npix_x, level);  in eg_surf_minify()
578     surflevel->npix_y = mip_minify(surf->npix_y, level);  in eg_surf_minify()
579     surflevel->npix_z = mip_minify(surf->npix_z, level);  in eg_surf_minify()
580     surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w;  in eg_surf_minify()
581     surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h;  in eg_surf_minify()
582     surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d;  in eg_surf_minify()
583     if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D &&  in eg_surf_minify()
585         if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) {  in eg_surf_minify()
586             surflevel->mode = RADEON_SURF_MODE_1D;  in eg_surf_minify()
590     surflevel->nblk_x  = ALIGN(surflevel->nblk_x, mtilew);  in eg_surf_minify()
591     surflevel->nblk_y  = ALIGN(surflevel->nblk_y, mtileh);  in eg_surf_minify()
592     surflevel->nblk_z  = ALIGN(surflevel->nblk_z, 1);  in eg_surf_minify()
595     mtile_pr = surflevel->nblk_x / mtilew;  in eg_surf_minify()
597     mtile_ps = (mtile_pr * surflevel->nblk_y) / mtileh;  in eg_surf_minify()
599     surflevel->offset = offset;  in eg_surf_minify()
600     surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;  in eg_surf_minify()
601     surflevel->slice_size = (uint64_t)mtile_ps * mtileb * slice_pt;  in eg_surf_minify()
603     surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;  in eg_surf_minify()
1415                            struct radeon_surface_level *surflevel,  in si_surf_minify()  argument
1421         surflevel->npix_x = surf->npix_x;  in si_surf_minify()
1423         surflevel->npix_x = mip_minify(next_power_of_two(surf->npix_x), level);  in si_surf_minify()
1425     surflevel->npix_y = mip_minify(surf->npix_y, level);  in si_surf_minify()
1426     surflevel->npix_z = mip_minify(surf->npix_z, level);  in si_surf_minify()
1429         surflevel->nblk_x = (next_power_of_two(surflevel->npix_x) + surf->blk_w - 1) / surf->blk_w;  in si_surf_minify()
1430         surflevel->nblk_y = (next_power_of_two(surflevel->npix_y) + surf->blk_h - 1) / surf->blk_h;  in si_surf_minify()
1431         surflevel->nblk_z = (next_power_of_two(surflevel->npix_z) + surf->blk_d - 1) / surf->blk_d;  in si_surf_minify()
1433         surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w;  in si_surf_minify()
1434         surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h;  in si_surf_minify()
1435         surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d;  in si_surf_minify()
1438     surflevel->nblk_y  = ALIGN(surflevel->nblk_y, yalign);  in si_surf_minify()
1447     else if (surflevel->mode == RADEON_SURF_MODE_LINEAR_ALIGNED)  in si_surf_minify()
1449         xalign = MAX2(xalign, slice_align / bpe / surflevel->nblk_y);  in si_surf_minify()
1451     surflevel->nblk_x  = ALIGN(surflevel->nblk_x, xalign);  in si_surf_minify()
1452     surflevel->nblk_z  = ALIGN(surflevel->nblk_z, zalign);  in si_surf_minify()
1454     surflevel->offset = offset;  in si_surf_minify()
1455     surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;  in si_surf_minify()
1456     surflevel->slice_size = ALIGN((uint64_t)surflevel->pitch_bytes * surflevel->nblk_y,  in si_surf_minify()
1459     surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;  in si_surf_minify()
1463                               struct radeon_surface_level *surflevel,  in si_surf_minify_2d()  argument
1471         surflevel->npix_x = surf->npix_x;  in si_surf_minify_2d()
1473         surflevel->npix_x = mip_minify(next_power_of_two(surf->npix_x), level);  in si_surf_minify_2d()
1475     surflevel->npix_y = mip_minify(surf->npix_y, level);  in si_surf_minify_2d()
1476     surflevel->npix_z = mip_minify(surf->npix_z, level);  in si_surf_minify_2d()
1479         surflevel->nblk_x = (next_power_of_two(surflevel->npix_x) + surf->blk_w - 1) / surf->blk_w;  in si_surf_minify_2d()
1480         surflevel->nblk_y = (next_power_of_two(surflevel->npix_y) + surf->blk_h - 1) / surf->blk_h;  in si_surf_minify_2d()
1481         surflevel->nblk_z = (next_power_of_two(surflevel->npix_z) + surf->blk_d - 1) / surf->blk_d;  in si_surf_minify_2d()
1483         surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w;  in si_surf_minify_2d()
1484         surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h;  in si_surf_minify_2d()
1485         surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d;  in si_surf_minify_2d()
1488     if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D &&  in si_surf_minify_2d()
1490         if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) {  in si_surf_minify_2d()
1491             surflevel->mode = RADEON_SURF_MODE_1D;  in si_surf_minify_2d()
1495     surflevel->nblk_x  = ALIGN(surflevel->nblk_x, xalign);  in si_surf_minify_2d()
1496     surflevel->nblk_y  = ALIGN(surflevel->nblk_y, yalign);  in si_surf_minify_2d()
1497     surflevel->nblk_z  = ALIGN(surflevel->nblk_z, zalign);  in si_surf_minify_2d()
1500     mtile_pr = surflevel->nblk_x / xalign;  in si_surf_minify_2d()
1502     mtile_ps = (mtile_pr * surflevel->nblk_y) / yalign;  in si_surf_minify_2d()
1503     surflevel->offset = offset;  in si_surf_minify_2d()
1504     surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples;  in si_surf_minify_2d()
1505     surflevel->slice_size = (uint64_t)mtile_ps * mtileb * slice_pt;  in si_surf_minify_2d()
1507     surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;  in si_surf_minify_2d()