119   void printTargetFlags(const MachineOperand &Op);
120   void print(const MachineOperand &Op, const TargetRegisterInfo *TRI,
122   void print(const MachineMemOperand &Op);
572     for (const auto *Op : MI.memoperands()) {  in print()  local
575       print(*Op);  in print()
669 void MIPrinter::printTargetFlags(const MachineOperand &Op) {  in printTargetFlags()  argument
670   if (!Op.getTargetFlags())  in printTargetFlags()
673       Op.getParent()->getParent()->getParent()->getSubtarget().getInstrInfo();  in printTargetFlags()
675   auto Flags = TII->decomposeMachineOperandsTargetFlags(Op.getTargetFlags());  in printTargetFlags()
729 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI,  in print()  argument
731   printTargetFlags(Op);  in print()
732   switch (Op.getType()) {  in print()
734     if (Op.isImplicit())  in print()
735       OS << (Op.isDef() ? "implicit-def " : "implicit ");  in print()
736     else if (!IsDef && Op.isDef())  in print()
739     if (Op.isInternalRead())  in print()
741     if (Op.isDead())  in print()
743     if (Op.isKill())  in print()
745     if (Op.isUndef())  in print()
747     if (Op.isEarlyClobber())  in print()
749     if (Op.isDebug())  in print()
751     printReg(Op.getReg(), OS, TRI);  in print()
753     if (Op.getSubReg() != 0)  in print()
754       OS << ':' << TRI->getSubRegIndexName(Op.getSubReg());  in print()
755     if (ShouldPrintRegisterTies && Op.isTied() && !Op.isDef())  in print()
756       OS << "(tied-def " << Op.getParent()->findTiedOperandIdx(I) << ")";  in print()
759     OS << Op.getImm();  in print()
762     Op.getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);  in print()
765     Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);  in print()
768     printMBBReference(*Op.getMBB());  in print()
771     printStackObjectReference(Op.getIndex());  in print()
774     OS << "%const." << Op.getIndex();  in print()
775     printOffset(Op.getOffset());  in print()
780             *Op.getParent()->getParent()->getParent(), Op.getIndex()))  in print()
785     printOffset(Op.getOffset());  in print()
789     OS << "%jump-table." << Op.getIndex();  in print()
793     printLLVMNameWithoutPrefix(OS, Op.getSymbolName());  in print()
794     printOffset(Op.getOffset());  in print()
797     Op.getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);  in print()
798     printOffset(Op.getOffset());  in print()
802     Op.getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false,  in print()
805     printIRBlockReference(*Op.getBlockAddress()->getBasicBlock());  in print()
807     printOffset(Op.getOffset());  in print()
810     auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());  in print()
818     const uint32_t *RegMask = Op.getRegLiveOut();  in print()
833     Op.getMetadata()->printAsOperand(OS, MST);  in print()
836     OS << "<mcsymbol " << *Op.getMCSymbol() << ">";  in print()
839     const auto &MMI = Op.getParent()->getParent()->getParent()->getMMI();  in print()
840     print(MMI.getFrameInstructions()[Op.getCFIIndex()], TRI);  in print()
846 void MIPrinter::print(const MachineMemOperand &Op) {  in print()  argument
849   if (Op.isVolatile())  in print()
851   if (Op.isNonTemporal())  in print()
853   if (Op.isInvariant())  in print()
855   if (Op.isLoad())  in print()
858     assert(Op.isStore() && "Non load machine operand must be a store");  in print()
861   OS << Op.getSize() << (Op.isLoad() ? " from " : " into ");  in print()
862   if (const Value *Val = Op.getValue()) {  in print()
865     const PseudoSourceValue *PVal = Op.getPseudoValue();  in print()
896   printOffset(Op.getOffset());  in print()
897   if (Op.getBaseAlignment() != Op.getSize())  in print()
898     OS << ", align " << Op.getBaseAlignment();  in print()
899   auto AAInfo = Op.getAAInfo();  in print()
912   if (Op.getRanges()) {  in print()
914     Op.getRanges()->printAsOperand(OS, MST);  in print()