179   MachineRegisterInfo *RegInfo = nullptr;  in ChangeToRegister()  local
183         RegInfo = &MF->getRegInfo();  in ChangeToRegister()
187   if (RegInfo && WasReg)  in ChangeToRegister()
188     RegInfo->removeRegOperandFromUseList(this);  in ChangeToRegister()
210   if (RegInfo)  in ChangeToRegister()
211     RegInfo->addRegOperandToUseList(this);  in ChangeToRegister()
1383                                       const TargetRegisterInfo &RegInfo) {  in substituteRegister()  argument
1386       ToReg = RegInfo.getSubReg(ToReg, SubIdx);  in substituteRegister()
1390       MO.substPhysReg(ToReg, RegInfo);  in substituteRegister()
1396       MO.substVirtReg(ToReg, SubIdx, RegInfo);  in substituteRegister()
1807                                      const TargetRegisterInfo *RegInfo,  in addRegisterKilled()  argument
1811     MCRegAliasIterator(IncomingReg, RegInfo, false).isValid();  in addRegisterKilled()
1836       if (RegInfo->isSuperRegister(IncomingReg, Reg))  in addRegisterKilled()
1838       if (RegInfo->isSubRegister(IncomingReg, Reg))  in addRegisterKilled()
1866                                       const TargetRegisterInfo *RegInfo) {  in clearRegisterKills()  argument
1868     RegInfo = nullptr;  in clearRegisterKills()
1873     if (OpReg == Reg || (RegInfo && RegInfo->isSuperRegister(Reg, OpReg)))  in clearRegisterKills()
1879                                    const TargetRegisterInfo *RegInfo,  in addRegisterDead()  argument
1883     MCRegAliasIterator(Reg, RegInfo, false).isValid();  in addRegisterDead()
1900       if (RegInfo->isSuperRegister(Reg, MOReg))  in addRegisterDead()
1902       if (RegInfo->isSubRegister(Reg, MOReg))  in addRegisterDead()
1947                                       const TargetRegisterInfo *RegInfo) {  in addRegisterDefined()  argument
1949     MachineOperand *MO = findRegisterDefOperand(Reg, false, RegInfo);  in addRegisterDefined()