Lines Matching refs:createResultReg
255 Reg = createResultReg(TLI.getRegClassFor(VT)); in materializeConstant()
756 CLI.ResultReg = createResultReg(TLI.getRegClassFor(MVT::i64)); in selectPatchpoint()
1308 ResultReg = createResultReg(DstClass); in selectBitCast()
1762 unsigned FastISel::createResultReg(const TargetRegisterClass *RC) { in createResultReg() function in FastISel
1774 unsigned NewOp = createResultReg(RegClass); in constrainOperandRegClass()
1785 unsigned ResultReg = createResultReg(RC); in fastEmitInst_()
1797 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r()
1819 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()
1844 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rrr()
1870 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri()
1893 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rii()
1917 unsigned ResultReg = createResultReg(RC); in fastEmitInst_f()
1937 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rri()
1959 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i()
1975 unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg()