Lines Matching refs:CurCycle
131 unsigned CurCycle; member in __anon884f54d00111::ScheduleDAGRRList
166 NeedLatency(needlatency), AvailableQueue(availqueue), CurCycle(0), in ScheduleDAGRRList()
325 CurCycle = 0; in Schedule()
601 if (NextCycle <= CurCycle) in AdvanceToCycle()
608 CurCycle = NextCycle; in AdvanceToCycle()
611 for (; CurCycle != NextCycle; ++CurCycle) { in AdvanceToCycle()
659 AdvanceToCycle(CurCycle + Stalls); in AdvancePastStalls()
707 DEBUG(dbgs() << "\n*** Scheduling [" << CurCycle << "]: "); in ScheduleNodeBottomUp()
711 if (CurCycle < SU->getHeight()) in ScheduleNodeBottomUp()
720 SU->setHeightToAtLeast(CurCycle); in ScheduleNodeBottomUp()
733 AdvanceToCycle(CurCycle + 1); in ScheduleNodeBottomUp()
784 AdvanceToCycle(CurCycle + 1); in ScheduleNodeBottomUp()
918 CurCycle = OldSU->getHeight(); in BacktrackBottomUp()
920 AvailableQueue->setCurCycle(CurCycle); in BacktrackBottomUp()
1529 AdvanceToCycle(std::max(CurCycle + 1, MinAvailableCycle)); in ListScheduleBottomUp()
1552 bool isReady(SUnit* SU, unsigned CurCycle) const { return true; } in isReady()
1608 bool isReady(SUnit *SU, unsigned CurCycle) const;
1625 bool isReady(SUnit *SU, unsigned CurCycle) const;
2535 bool hybrid_ls_rr_sort::isReady(SUnit *SU, unsigned CurCycle) const { in isReady()
2540 if (SU->getHeight() > (CurCycle + ReadyDelay)) return false; in isReady()
2582 bool ilp_ls_rr_sort::isReady(SUnit *SU, unsigned CurCycle) const { in isReady()
2583 if (SU->getHeight() > CurCycle) return false; in isReady()