527   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in ReleasePredecessors()
809   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in UnscheduleNodeBottomUp()
1030     for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in CopyAndMoveSuccessors()
1111   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in CopyAndMoveSuccessors()
1278   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in DelayForLiveRegsBottomUp()
1857   for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in CalcNodeSethiUllmanNumber()
1959   for (SUnit::const_pred_iterator I = SU->Preds.begin(),E = SU->Preds.end();  in HighRegPressure()
2009   for (SUnit::const_pred_iterator I = SU->Preds.begin(),E = SU->Preds.end();  in RegPressureDiff()
2053   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in scheduledNode()
2135   for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in unscheduledNode()
2223   for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in calcMaxScratches()
2235   for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in hasOnlyLiveInOpers()
2296   for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();  in initVRegCycle()
2309   for (SUnit::const_pred_iterator I = SU->Preds.begin(),E = SU->Preds.end();  in resetVRegCycle()
2328   for (SUnit::const_pred_iterator I = SU->Preds.begin(),E = SU->Preds.end();  in hasVRegCycleUse()
2732     for (SUnit::const_pred_iterator PI = SuccSU->Preds.begin(),  in canClobberReachingPhysRegUse()
2733            PE = SuccSU->Preds.end(); PI != PE; ++PI) {  in canClobberReachingPhysRegUse()
2846     for (SUnit::const_pred_iterator II = SU->Preds.begin(),  in PrescheduleNodesWithMultipleUses()
2847          EE = SU->Preds.end(); II != EE; ++II)  in PrescheduleNodesWithMultipleUses()