Lines Matching refs:DCI
1260 DAGCombinerInfo &DCI, SDLoc dl) const { in SimplifySetCC() argument
1261 SelectionDAG &DAG = DCI.DAG; in SimplifySetCC()
1282 (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1341 DCI.isBeforeLegalize() && N0->hasOneUse()) { in SimplifySetCC()
1395 if (DCI.isBeforeLegalize() && in SimplifySetCC()
1488 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1525 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
1526 DCI.AddToWorklist(ZextOp.getNode()); in SimplifySetCC()
1546 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1636 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1651 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1715 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1750 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1782 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1886 if (NewCond != Cond && (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1977 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
1978 DCI.AddToWorklist(SH.getNode()); in SimplifySetCC()
2002 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
2003 DCI.AddToWorklist(SH.getNode()); in SimplifySetCC()
2017 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2028 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
2045 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
2046 DCI.AddToWorklist(Temp.getNode()); in SimplifySetCC()
2055 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
2056 DCI.AddToWorklist(Temp.getNode()); in SimplifySetCC()
2062 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
2063 DCI.AddToWorklist(Temp.getNode()); in SimplifySetCC()
2069 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
2070 DCI.AddToWorklist(Temp.getNode()); in SimplifySetCC()
2079 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
2080 DCI.AddToWorklist(N0.getNode()); in SimplifySetCC()
2124 DAGCombinerInfo &DCI) const { in PerformDAGCombine()