Lines Matching refs:GPR32RegClass

345                                                    : &AArch64::GPR32RegClass;  in materializeInt()
378 &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in materializeFP()
1261 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitAddSub_rr()
1304 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitAddSub_ri()
1346 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitAddSub_rs()
1387 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitAddSub_rx()
1684 RC = &AArch64::GPR32RegClass; in emitLogicalOp_rs()
1790 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass; in emitLoad()
1795 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass; in emitLoad()
1800 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass; in emitLoad()
2429 ResultReg = createResultReg(&AArch64::GPR32RegClass); in selectCmp()
2448 ResultReg = createResultReg(&AArch64::GPR32RegClass); in selectCmp()
2469 unsigned TmpReg1 = createResultReg(&AArch64::GPR32RegClass); in selectCmp()
2550 unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg, in optimizeSelect()
2572 RC = &AArch64::GPR32RegClass; in selectSelect()
2745 DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass); in selectFPToInt()
2870 RC = &AArch64::GPR32RegClass; in fastLowerArguments()
3626 ResultReg2 = fastEmitInst_rri(AArch64::CSINCWr, &AArch64::GPR32RegClass, in fastLowerIntrinsicCall()
3792 ResultReg = createResultReg(&AArch64::GPR32RegClass); in selectTrunc()
3830 return fastEmitInst_rii(AArch64::SBFMWri, &AArch64::GPR32RegClass, SrcReg, in emiti1Ext()
3850 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitMul_rr()
3889 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitLSL_rr()
3917 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitLSL_ri()
3995 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitLSR_rr()
4024 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitLSR_ri()
4116 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitASR_rr()
4145 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitASR_ri()
4268 (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in emitIntExt()
4460 (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass; in selectRem()
4658 case MVT::i32: RC = &AArch64::GPR32RegClass; break; in selectBitCast()
4757 RC = &AArch64::GPR32RegClass; in selectSDiv()