344   const TargetRegisterClass *RC = (VT == MVT::i64) ? &AArch64::GPR64RegClass  in materializeInt()
378         &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in materializeFP()
436     ResultReg = createResultReg(&AArch64::GPR64RegClass);  in materializeGV()
1261       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rr()
1304     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_ri()
1346       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rs()
1387     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rx()
1688     RC = &AArch64::GPR64RegClass;  in emitLogicalOp_rs()
1790              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1795              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1800              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1804     RC = &AArch64::GPR64RegClass;  in emitLoad()
1832     unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);  in emitLoad()
2576     RC = &AArch64::GPR64RegClass;  in selectSelect()
2745       DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);  in selectFPToInt()
2874       RC = &AArch64::GPR64RegClass;  in fastLowerArguments()
3118       CallReg = createResultReg(&AArch64::GPR64RegClass);  in fastLowerCall()
3312     unsigned SrcReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);  in fastLowerIntrinsicCall()
3323       DestReg = fastEmitInst_ri(AArch64::LDRXui, &AArch64::GPR64RegClass,  in fastLowerIntrinsicCall()
3816       unsigned Reg64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);  in emiti1Ext()
3850       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitMul_rr()
3860   return fastEmitInst_rrr(AArch64::SMADDLrrr, &AArch64::GPR64RegClass,  in emitSMULL_rr()
3870   return fastEmitInst_rrr(AArch64::UMADDLrrr, &AArch64::GPR64RegClass,  in emitUMULL_rr()
3889       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_rr()
3917       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_ri()
3995       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_rr()
4024       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_ri()
4116       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_rr()
4145       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_ri()
4258     unsigned Src64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);  in emitIntExt()
4268       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitIntExt()
4355     unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);  in optimizeIntExtLoad()
4398         unsigned ResultReg = createResultReg(&AArch64::GPR64RegClass);  in selectIntExt()
4460       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in selectRem()
4659   case MVT::i64: RC = &AArch64::GPR64RegClass; break;  in selectBitCast()
4754     RC = &AArch64::GPR64RegClass;  in selectSDiv()