219                       unsigned Op1Reg, bool Op1IsKill);
223                       unsigned Op1Reg, bool Op1IsKill);
227                       unsigned Op1Reg, bool Op1IsKill);
3876                                      unsigned Op1Reg, bool Op1IsKill) {  in emitLSL_rr()  argument
3891     Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Op1IsKill, Mask);  in emitLSL_rr()
3894   unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,  in emitLSL_rr()
3982                                      unsigned Op1Reg, bool Op1IsKill) {  in emitLSR_rr()  argument
3998     Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Op1IsKill, Mask);  in emitLSR_rr()
4001   unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,  in emitLSR_rr()
4103                                      unsigned Op1Reg, bool Op1IsKill) {  in emitASR_rr()  argument
4119     Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Op1IsKill, Mask);  in emitASR_rr()
4122   unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,  in emitASR_rr()
4609   unsigned Op1Reg = getRegForValue(I->getOperand(1));  in selectShift()  local
4610   if (!Op1Reg)  in selectShift()
4618     ResultReg = emitLSL_rr(RetVT, Op0Reg, Op0IsKill, Op1Reg, Op1IsKill);  in selectShift()
4621     ResultReg = emitASR_rr(RetVT, Op0Reg, Op0IsKill, Op1Reg, Op1IsKill);  in selectShift()
4624     ResultReg = emitLSR_rr(RetVT, Op0Reg, Op0IsKill, Op1Reg, Op1IsKill);  in selectShift()