Lines Matching refs:Src1Reg
2536 unsigned Src1Reg = getRegForValue(Src1Val); in optimizeSelect() local
2537 if (!Src1Reg) in optimizeSelect()
2547 Src1Reg = emitLogicalOp_ri(ISD::XOR, MVT::i32, Src1Reg, Src1IsKill, 1); in optimizeSelect()
2550 unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg, in optimizeSelect()
2666 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
2672 if (!Src1Reg || !Src2Reg) in selectSelect()
2676 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
2680 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
4454 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectRem() local
4455 if (!Src1Reg) in selectRem()
4462 Src1Reg, /*IsKill=*/false); in selectRem()
4467 Src1Reg, Src1IsKill, Src0Reg, in selectRem()
4532 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectMul() local
4533 if (!Src1Reg) in selectMul()
4537 unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src0IsKill, Src1Reg, Src1IsKill); in selectMul()