Lines Matching refs:Vd

5072   def : InstAlias<asm # "\t$Vd.4h, $Vn.4h, #0",
5073                   (!cast<Instruction>(NAME # v4i16rz) V64:$Vd, V64:$Vn), 0>;
5074   def : InstAlias<asm # "\t$Vd.8h, $Vn.8h, #0",
5075                   (!cast<Instruction>(NAME # v8i16rz) V128:$Vd, V128:$Vn), 0>;
5077   def : InstAlias<asm # "\t$Vd.2s, $Vn.2s, #0",
5078                   (!cast<Instruction>(NAME # v2i32rz) V64:$Vd, V64:$Vn), 0>;
5079   def : InstAlias<asm # "\t$Vd.4s, $Vn.4s, #0",
5080                   (!cast<Instruction>(NAME # v4i32rz) V128:$Vd, V128:$Vn), 0>;
5081   def : InstAlias<asm # "\t$Vd.2d, $Vn.2d, #0",
5082                   (!cast<Instruction>(NAME # v2i64rz) V128:$Vd, V128:$Vn), 0>;
5084   def : InstAlias<asm # ".4h\t$Vd, $Vn, #0",
5085                   (!cast<Instruction>(NAME # v4i16rz) V64:$Vd, V64:$Vn), 0>;
5086   def : InstAlias<asm # ".8h\t$Vd, $Vn, #0",
5087                   (!cast<Instruction>(NAME # v8i16rz) V128:$Vd, V128:$Vn), 0>;
5089   def : InstAlias<asm # ".2s\t$Vd, $Vn, #0",
5090                   (!cast<Instruction>(NAME # v2i32rz) V64:$Vd, V64:$Vn), 0>;
5091   def : InstAlias<asm # ".4s\t$Vd, $Vn, #0",
5092                   (!cast<Instruction>(NAME # v4i32rz) V128:$Vd, V128:$Vn), 0>;
5093   def : InstAlias<asm # ".2d\t$Vd, $Vn, #0",
5094                   (!cast<Instruction>(NAME # v2i64rz) V128:$Vd, V128:$Vn), 0>;
6363   : I<(outs vectype:$Vd), (ins listtype:$Vn, vectype:$Vm), asm,
6364        "\t$Vd" # kind # ", $Vn, $Vm" # kind, "", []>,
6366   bits<5> Vd;
6378   let Inst{4-0}   = Vd;
6384   : I<(outs vectype:$dst), (ins vectype:$Vd, listtype:$Vn, vectype:$Vm), asm,
6385        "\t$Vd" # kind # ", $Vn, $Vm" # kind, "$Vd = $dst", []>,
6387   bits<5> Vd;
6399   let Inst{4-0}   = Vd;