Lines Matching refs:DestReg
1516 static bool forwardCopyWillClobberTuple(unsigned DestReg, unsigned SrcReg, in forwardCopyWillClobberTuple() argument
1520 return ((DestReg - SrcReg) & 0x1f) < NumRegs; in forwardCopyWillClobberTuple()
1525 unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode, in copyPhysRegTuple() argument
1530 uint16_t DestEncoding = TRI->getEncodingValue(DestReg); in copyPhysRegTuple()
1543 AddSubReg(MIB, DestReg, Indices[SubReg], RegState::Define, TRI); in copyPhysRegTuple()
1551 unsigned DestReg, unsigned SrcReg, in copyPhysReg() argument
1553 if (AArch64::GPR32spRegClass.contains(DestReg) && in copyPhysReg()
1557 if (DestReg == AArch64::WSP || SrcReg == AArch64::WSP) { in copyPhysReg()
1561 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1575 BuildMI(MBB, I, DL, get(AArch64::ADDWri), DestReg) in copyPhysReg()
1581 BuildMI(MBB, I, DL, get(AArch64::MOVZWi), DestReg).addImm(0).addImm( in copyPhysReg()
1586 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1600 BuildMI(MBB, I, DL, get(AArch64::ORRWrr), DestReg) in copyPhysReg()
1608 if (AArch64::GPR64spRegClass.contains(DestReg) && in copyPhysReg()
1610 if (DestReg == AArch64::SP || SrcReg == AArch64::SP) { in copyPhysReg()
1612 BuildMI(MBB, I, DL, get(AArch64::ADDXri), DestReg) in copyPhysReg()
1617 BuildMI(MBB, I, DL, get(AArch64::MOVZXi), DestReg).addImm(0).addImm( in copyPhysReg()
1621 BuildMI(MBB, I, DL, get(AArch64::ORRXrr), DestReg) in copyPhysReg()
1629 if (AArch64::DDDDRegClass.contains(DestReg) && in copyPhysReg()
1633 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8, in copyPhysReg()
1639 if (AArch64::DDDRegClass.contains(DestReg) && in copyPhysReg()
1643 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8, in copyPhysReg()
1649 if (AArch64::DDRegClass.contains(DestReg) && in copyPhysReg()
1652 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8, in copyPhysReg()
1658 if (AArch64::QQQQRegClass.contains(DestReg) && in copyPhysReg()
1662 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8, in copyPhysReg()
1668 if (AArch64::QQQRegClass.contains(DestReg) && in copyPhysReg()
1672 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8, in copyPhysReg()
1678 if (AArch64::QQRegClass.contains(DestReg) && in copyPhysReg()
1681 copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8, in copyPhysReg()
1686 if (AArch64::FPR128RegClass.contains(DestReg) && in copyPhysReg()
1689 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1700 .addReg(DestReg, RegState::Define) in copyPhysReg()
1707 if (AArch64::FPR64RegClass.contains(DestReg) && in copyPhysReg()
1710 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
1714 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1718 BuildMI(MBB, I, DL, get(AArch64::FMOVDr), DestReg) in copyPhysReg()
1724 if (AArch64::FPR32RegClass.contains(DestReg) && in copyPhysReg()
1727 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
1731 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1735 BuildMI(MBB, I, DL, get(AArch64::FMOVSr), DestReg) in copyPhysReg()
1741 if (AArch64::FPR16RegClass.contains(DestReg) && in copyPhysReg()
1744 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
1748 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1752 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
1756 BuildMI(MBB, I, DL, get(AArch64::FMOVSr), DestReg) in copyPhysReg()
1762 if (AArch64::FPR8RegClass.contains(DestReg) && in copyPhysReg()
1765 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::bsub, in copyPhysReg()
1769 BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg) in copyPhysReg()
1773 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::bsub, in copyPhysReg()
1777 BuildMI(MBB, I, DL, get(AArch64::FMOVSr), DestReg) in copyPhysReg()
1784 if (AArch64::FPR64RegClass.contains(DestReg) && in copyPhysReg()
1786 BuildMI(MBB, I, DL, get(AArch64::FMOVXDr), DestReg) in copyPhysReg()
1790 if (AArch64::GPR64RegClass.contains(DestReg) && in copyPhysReg()
1792 BuildMI(MBB, I, DL, get(AArch64::FMOVDXr), DestReg) in copyPhysReg()
1797 if (AArch64::FPR32RegClass.contains(DestReg) && in copyPhysReg()
1799 BuildMI(MBB, I, DL, get(AArch64::FMOVWSr), DestReg) in copyPhysReg()
1803 if (AArch64::GPR32RegClass.contains(DestReg) && in copyPhysReg()
1805 BuildMI(MBB, I, DL, get(AArch64::FMOVSWr), DestReg) in copyPhysReg()
1810 if (DestReg == AArch64::NZCV) { in copyPhysReg()
1820 assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy"); in copyPhysReg()
1822 .addReg(DestReg) in copyPhysReg()
1930 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, in loadRegFromStackSlot() argument
1957 if (TargetRegisterInfo::isVirtualRegister(DestReg)) in loadRegFromStackSlot()
1958 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR32RegClass); in loadRegFromStackSlot()
1960 assert(DestReg != AArch64::WSP); in loadRegFromStackSlot()
1967 if (TargetRegisterInfo::isVirtualRegister(DestReg)) in loadRegFromStackSlot()
1968 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass); in loadRegFromStackSlot()
1970 assert(DestReg != AArch64::SP); in loadRegFromStackSlot()
2019 .addReg(DestReg, getDefRegState(true)) in loadRegFromStackSlot()
2028 unsigned DestReg, unsigned SrcReg, int Offset, in emitFrameOffset() argument
2031 if (DestReg == SrcReg && Offset == 0) in emitFrameOffset()
2066 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg) in emitFrameOffset()
2072 SrcReg = DestReg; in emitFrameOffset()
2077 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg) in emitFrameOffset()