Lines Matching refs:GPR64RegClass
488 if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) { in insertSelect()
489 RC = &AArch64::GPR64RegClass; in insertSelect()
1142 AArch64::GPR64RegClass.contains(DstReg)); in isGPRCopy()
1785 AArch64::GPR64RegClass.contains(SrcReg)) { in copyPhysReg()
1790 if (AArch64::GPR64RegClass.contains(DestReg) && in copyPhysReg()
1811 assert(AArch64::GPR64RegClass.contains(SrcReg) && "Invalid NZCV copy"); in copyPhysReg()
1820 assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy"); in copyPhysReg()
1870 MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass); in storeRegToStackSlot()
1968 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass); in loadRegFromStackSlot()
2105 MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass); in foldMemoryOperandImpl()
2110 MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass); in foldMemoryOperandImpl()
2729 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2744 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2770 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2812 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2836 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2862 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()