1316 AArch64InstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,  in getMemOpBaseRegImmOfs()  argument
1319   switch (LdSt->getOpcode()) {  in getMemOpBaseRegImmOfs()
1332     if (!LdSt->getOperand(1).isReg() || !LdSt->getOperand(2).isImm())  in getMemOpBaseRegImmOfs()
1334     BaseReg = LdSt->getOperand(1).getReg();  in getMemOpBaseRegImmOfs()
1335     MachineFunction &MF = *LdSt->getParent()->getParent();  in getMemOpBaseRegImmOfs()
1336     unsigned Width = getRegClass(LdSt->getDesc(), 0, TRI, MF)->getSize();  in getMemOpBaseRegImmOfs()
1337     Offset = LdSt->getOperand(2).getImm() * Width;  in getMemOpBaseRegImmOfs()
1343     MachineInstr *LdSt, unsigned &BaseReg, int &Offset, int &Width,  in getMemOpBaseRegImmOfsWidth()  argument
1346   if (LdSt->getNumOperands() != 3)  in getMemOpBaseRegImmOfsWidth()
1348   if (!LdSt->getOperand(1).isReg() || !LdSt->getOperand(2).isImm())  in getMemOpBaseRegImmOfsWidth()
1354   switch (LdSt->getOpcode()) {  in getMemOpBaseRegImmOfsWidth()
1425   BaseReg = LdSt->getOperand(1).getReg();  in getMemOpBaseRegImmOfsWidth()
1426   Offset = LdSt->getOperand(2).getImm() * Scale;  in getMemOpBaseRegImmOfsWidth()