Lines Matching refs:getShiftExtendAmount
427 unsigned getShiftExtendAmount() const { in getShiftExtendAmount() function in __anon26fd99540211::AArch64Operand
1007 getShiftExtendAmount() <= 4; in isExtend()
1023 getShiftExtendAmount() <= 4; in isExtendLSL64()
1031 (getShiftExtendAmount() == Log2_32(Width / 8) || in isMemXExtend()
1032 getShiftExtendAmount() == 0); in isMemXExtend()
1040 (getShiftExtendAmount() == Log2_32(Width / 8) || in isMemWExtend()
1041 getShiftExtendAmount() == 0); in isMemWExtend()
1052 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
1064 getShiftExtendAmount() < width; in isLogicalShifter()
1075 uint64_t Val = getShiftExtendAmount(); in isMovImm32Shifter()
1087 uint64_t Val = getShiftExtendAmount(); in isMovImm64Shifter()
1096 unsigned Shift = getShiftExtendAmount(); in isLogicalVecShifter()
1106 unsigned Shift = getShiftExtendAmount(); in isLogicalVecHalfWordShifter()
1116 unsigned Shift = getShiftExtendAmount(); in isMoveVecShifter()
1568 AArch64_AM::getShifterImm(getShiftExtendType(), getShiftExtendAmount()); in addShifterOperands()
1576 unsigned Imm = AArch64_AM::getArithExtendImm(ET, getShiftExtendAmount()); in addExtendOperands()
1584 unsigned Imm = AArch64_AM::getArithExtendImm(ET, getShiftExtendAmount()); in addExtend64Operands()
1593 Inst.addOperand(MCOperand::createImm(getShiftExtendAmount() != 0)); in addMemExtendOperands()
1853 << getShiftExtendAmount(); in print()